SHF: Medium: Automating High Level Synthesis via Graph-Centric Deep Learning

SHF:中:通过以图为中心的深度学习实现高级综合自动化

基本信息

  • 批准号:
    2211557
  • 负责人:
  • 金额:
    $ 120万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Continuing Grant
  • 财政年份:
    2022
  • 资助国家:
    美国
  • 起止时间:
    2022-10-01 至 2025-09-30
  • 项目状态:
    未结题

项目摘要

Domain-specific accelerators (DSAs), such as those developed in recent years to accelerate deep learning applications, have been shown to offer significant performance and energy efficiency over general-purpose CPUs to meet the ever-increasing performance needs. However, DSAs are hard to design and require deep hardware and circuit-design knowledge to achieve high performance, which are lacking by most software programmers. Although the recent advances in high-level synthesis (HLS) tools made it possible to compile high-level software programs to circuit designs, one still needs to have extensive experience to perform microarchitecture optimizations by restructuring or augmenting the programs, which presents a significant barrier to a typical application-domain expert or software developer to design a DSA. The project aims to leverage machine learning and AI techniques to automate microarchitecture optimization and enable a typical software programmer to be able to design highly efficient hardware DSAs, with the quality comparable to those designed by well-trained circuit designers. As a result, it will enable wider and more rapid adoption of customized computing using DSAs to achieve significant improvement in computing efficiency. This project also plans to integrate the research with education to expose students to exciting opportunities in applying AI and ML techniques to electronic design automation, and broaden the participation in computing via high-school summer programs and partnership with the Center for Excellence in Engineering and Diversity (CEED) and Women in Engineering at UCLA.The project addresses two challenges in automating program transformation for HLS microarchitecture optimization: (1) the evaluation of each HLS design is time-consuming; and (2) the HLS design space is extremely large for brute-force search. The project develops a fully automated framework, named DeepAccel, for evaluating and optimizing the microarchitecture of a DSA design without the invocation of the time-consuming HLS tools. It represents the input C/C++ program as one or a set of graphs with the proper data-flow and control-flow information, including auto-inserted optimization directives (pragmas), and then makes use of the latest advances in graph-based machine learning (ML) and ML-driven optimizations to quickly evaluate each solution candidate and guide the optimization process. The approach is transformative, including the following research components: (1) the project tackles the fundamental representation problem on how to represent programs and associated transformations via graph-representation learning so one can apply the latest advances in deep learning, such as graph neural networks, knowledge distillation, meta-learning, and casual inferencing, to HLS design optimization; (2) the project designs trustworthy and adaptive deep-learning models for HLS performance prediction based on biased and sparsely labeled dataset; and (3) the project uses reinforcement learning and other scalable search algorithms to effectively cope with the combinatoric explosion of the search space. Based on these capabilities, DeepAccel is expected to automate the DSA design process for most performance-oriented software programmers.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
领域特定加速器(DSA),例如近年来开发的用于加速深度学习应用程序的加速器,已被证明可以提供优于通用CPU的显著性能和能效,以满足不断增长的性能需求。然而,DSA很难设计,需要深厚的硬件和电路设计知识来实现高性能,而这是大多数软件程序员所缺乏的。尽管高级综合(HLS)工具的最新进展使得将高级软件程序编译为电路设计成为可能,但仍然需要具有丰富的经验来通过重构或扩充程序来执行微架构优化,这对典型的应用领域专家或软件开发人员设计DSA构成了重大障碍。该项目旨在利用机器学习和人工智能技术来自动化微架构优化,并使典型的软件程序员能够设计出高效的硬件DSA,其质量可与训练有素的电路设计师设计的产品相媲美。 因此,它将使更广泛和更迅速地采用使用DSA的定制计算,以实现计算效率的显着提高。该项目还计划将研究与教育相结合,让学生获得将人工智能和机器学习技术应用于电子设计自动化的令人兴奋的机会,并通过高中暑期课程以及与卓越工程和多样性中心(CEED)的合作关系,扩大对计算的参与该项目解决了HLS微架构优化自动化程序转换的两个挑战:(1)对每个HLS设计的评估是耗时的;以及(2)HLS设计空间对于蛮力搜索是非常大的。该项目开发了一个完全自动化的框架,名为DeepAccel,用于评估和优化DSA设计的微架构,而无需调用耗时的HLS工具。它将输入C/C++程序表示为一个或一组具有适当数据流和控制流信息的图,包括自动插入的优化指令(pragmas),然后利用基于图的机器学习(ML)和ML驱动优化的最新进展来快速评估每个解决方案候选者并指导优化过程。该方法是变革性的,包括以下研究内容:(1)该项目解决了如何通过图表示学习表示程序和相关转换的基本表示问题,因此可以将深度学习的最新进展,如图神经网络,知识蒸馏,元学习和因果推理,应用于HLS设计优化;(2)该项目基于有偏和稀疏标记的数据集设计了用于HLS性能预测的可信和自适应深度学习模型;(3)该项目使用强化学习和其他可扩展搜索算法来有效科普搜索空间的组合爆炸。基于这些能力,DeepAccel有望为大多数以性能为导向的软件程序员实现DSA设计过程的自动化。该奖项反映了NSF的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。

项目成果

期刊论文数量(13)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Question-Answer Sentence Graph for Joint Modeling Answer Selection
联合建模答案选择的问答句图
HOPE: High-order Graph ODE For Modeling Interacting Dynamics
  • DOI:
  • 发表时间:
    2023
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Xiao Luo;Jingyang Yuan;Zijie Huang;Huiyu Jiang;Yifang Qin;Wei Ju;Ming Zhang;Yizhou Sun
  • 通讯作者:
    Xiao Luo;Jingyang Yuan;Zijie Huang;Huiyu Jiang;Yifang Qin;Wei Ju;Ming Zhang;Yizhou Sun
Tab-Cleaner: Weakly Supervised Tabular Data Cleaning via Pre-training for E-commerce Catalog
  • DOI:
    10.18653/v1/2023.acl-industry.18
  • 发表时间:
    2023
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Kewei Cheng;Xian Li;Zhengyang Wang;Chenwei Zhang;Binxuan Huang;Y. Xu;X. Dong;Yizhou Sun
  • 通讯作者:
    Kewei Cheng;Xian Li;Zhengyang Wang;Chenwei Zhang;Binxuan Huang;Y. Xu;X. Dong;Yizhou Sun
PaGE-Link: Path-based Graph Neural Network Explanation for Heterogeneous Link Prediction
  • DOI:
    10.1145/3543507.3583511
  • 发表时间:
    2023-02
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Shichang Zhang;Jiani Zhang;Xiang Song;Soji Adeshina;Da Zheng;C. Faloutsos;Yizhou Sun
  • 通讯作者:
    Shichang Zhang;Jiani Zhang;Xiang Song;Soji Adeshina;Da Zheng;C. Faloutsos;Yizhou Sun
A Single Vector Is Not Enough: Taxonomy Expansion via Box Embeddings
  • DOI:
    10.1145/3543507.3583310
  • 发表时间:
    2023-04
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Song Jiang;Qiyue Yao;Qifan Wang;Yizhou Sun
  • 通讯作者:
    Song Jiang;Qiyue Yao;Qifan Wang;Yizhou Sun
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Jason Cong其他文献

Compilation for Dynamically Field-Programmable Qubit Arrays with Efficient and Provably Near-Optimal Scheduling
具有高效且可证明接近最优调度的动态现场可编程量子位阵列的编译
  • DOI:
  • 发表时间:
    2024
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Daniel Bochen Tan;Wan;Jason Cong
  • 通讯作者:
    Jason Cong
span style=font-family:; cambria,serif;font-size:12pt;=GRT: a Reconfigurable SDR Platform with High Performance and Usability/span
GRT:具有高性能和可用性的可重构 SDR 平台
  • DOI:
  • 发表时间:
    2014
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Tao Wang;Guangyu Sun;Jiahua Chen;Jian Gong;Haoyang Wu;Xiaoguang Li;Songwu Lu;Jason Cong
  • 通讯作者:
    Jason Cong
Enhancing High-Level Synthesis with Automated Pragma Insertion and Code Transformation Framework
通过自动编译指示插入和代码转换框架增强高级综合
  • DOI:
    10.48550/arxiv.2405.03058
  • 发表时间:
    2024
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Stéphane Pouget;L. Pouchet;Jason Cong
  • 通讯作者:
    Jason Cong
RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses
RC-NVM:支持行和列存储器访问的双寻址非易失性存储器架构
  • DOI:
    10.1109/tc.2018.2868368
  • 发表时间:
    2019-02
  • 期刊:
  • 影响因子:
    3.7
  • 作者:
    Shuo Li;Nong Xiao;Peng Wang;Guangyu Sun;Xiaoyang Wang;Yiran Chen;Hai Li;Jason Cong;Tao Zhang
  • 通讯作者:
    Tao Zhang
Quantum State Preparation Using an Exact CNOT Synthesis Formulation
使用精确的 CNOT 合成公式制备量子态
  • DOI:
    10.48550/arxiv.2401.01009
  • 发表时间:
    2024
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Hanyu Wang;Daniel Bochen Tan;Jason Cong;G. Micheli
  • 通讯作者:
    G. Micheli

Jason Cong的其他文献

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{{ truncateString('Jason Cong', 18)}}的其他基金

Collaborative Research: FET: Medium: Efficient Compilation for Dynamically Reconfigurable Atom Arrays
合作研究:FET:中:动态可重构原子阵列的高效编译
  • 批准号:
    2313083
  • 财政年份:
    2023
  • 资助金额:
    $ 120万
  • 项目类别:
    Standard Grant
RTML: Large: Acceleration to Graph-Based Machine Learning
RTML:大型:加速基于图的机器学习
  • 批准号:
    1937599
  • 财政年份:
    2019
  • 资助金额:
    $ 120万
  • 项目类别:
    Standard Grant
CAPA: Collaborative Research: A Multi-Paradigm Programming Infrastructure for Heterogeneous Architectures
CAPA:协作研究:异构架构的多范式编程基础设施
  • 批准号:
    1723773
  • 财政年份:
    2017
  • 资助金额:
    $ 120万
  • 项目类别:
    Continuing Grant
Accelerator-Rich Architectures with Applications to Healthcare
富含加速器的架构及其在医疗保健领域的应用
  • 批准号:
    1436827
  • 财政年份:
    2014
  • 资助金额:
    $ 120万
  • 项目类别:
    Continuing Grant
NSF Workshop; Electronic Design Automation -- Past, Present, and Future
美国国家科学基金会研讨会;
  • 批准号:
    0930477
  • 财政年份:
    2009
  • 资助金额:
    $ 120万
  • 项目类别:
    Standard Grant
Synthesis and Mapping for Application-Specific Processor Networks
特定应用处理器网络的综合和映射
  • 批准号:
    0903541
  • 财政年份:
    2009
  • 资助金额:
    $ 120万
  • 项目类别:
    Standard Grant
Customizable Domain-Specific Computing
可定制的特定领域计算
  • 批准号:
    0926127
  • 财政年份:
    2009
  • 资助金额:
    $ 120万
  • 项目类别:
    Standard Grant
SGER: Platforms for Future Embedded Systems
SGER:未来嵌入式系统的平台
  • 批准号:
    0647442
  • 财政年份:
    2006
  • 资助金额:
    $ 120万
  • 项目类别:
    Standard Grant
International Center on Design for Nanotechnologies
国际纳米技术设计中心
  • 批准号:
    0530261
  • 财政年份:
    2005
  • 资助金额:
    $ 120万
  • 项目类别:
    Continuing Grant
MSPA-MCS: Scalable Optimization Algorithms for VLSI Circuit Physical Design
MSPA-MCS:VLSI 电路物理设计的可扩展优化算法
  • 批准号:
    0528583
  • 财政年份:
    2005
  • 资助金额:
    $ 120万
  • 项目类别:
    Continuing Grant

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