RTML: Large: Acceleration to Graph-Based Machine Learning
RTML:大型:加速基于图的机器学习
基本信息
- 批准号:1937599
- 负责人:
- 金额:$ 150万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2019
- 资助国家:美国
- 起止时间:2019-10-01 至 2024-09-30
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Graphs are ubiquitous, and often the fundamental data structure in many applications including bioinformatics, chemistry, healthcare, social networks, recommender systems and systems analysis. Machine learning (ML) using graphs is receiving increasing attention, both where graphs are a representation of data, as in graph neural networks (GNN) algorithms, and where graphs are an efficient ML model representation, as in arithmetic circuits representation of probabilistic graphical models. While useful, graph-based ML poses unique challenges to existing computation hardware (Central Processing Units and Graphics Processing Units) due to the combination of irregular memory access and dynamic parallelism imposed by the graph structure and the dense computation required for relevant learning algorithms, though hardware-based implementations are highly desirable to enable real-time processing of streams of data generated by such applications. The project addresses these challenges with a novel accelerator architecture for graph-based ML, along with a supporting open source software stack, simulator, and field-programmable gate-array (FPGA) prototype. Beyond the technical contributions, the project will integrate the latest research into several graduate and upper-division undergraduate courses. The project will also work with the UCLA Center for Excellence in Engineering and Diversity (CEED) and Women in Engineering to recruit highly diversified undergraduate and graduate students to participate in the research. The project targets a programmable and heterogeneous multi-accelerator architecture, with software-controlled compute and memory resources. It is specialized in the following ways to meet the needs of graph-based machine learning. First, it supports composing accelerator engines for efficient pipelining of graph-based prefetching with dense computation units. Second, the prefetching hardware will be co-designed with GNN algorithms to support recent and upcoming advances in graph sampling and graph-coarsening algorithms. Third, it will include a high bandwidth scratchpad architecture optimized for indirect access, and spatial compute fabrics (e.g. systolic arrays) optimized for dense computation. Finally, the execution model will be based on an architecture-aware task-parallel model, which has rich-enough primitives to take advantage of heterogeneous hardware, while being flexible enough to load balance for dynamic parallelism. The key components of the proposed architecture will be prototyped on an FPGA. Overall, the goal of the work is to greatly advance the state-of-the-art of graph-based ML in terms of model accuracy, efficiency, and real-time inference and learning. The project will also collaborate with a synergistic DARPA program for related hardware development.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
图是普遍存在的,并且通常是许多应用中的基本数据结构,包括生物信息学、化学、医疗保健、社交网络、推荐系统和系统分析。 使用图的机器学习(ML)正受到越来越多的关注,其中图是数据的表示,如图神经网络(GNN)算法中,图是有效的ML模型表示,如概率图模型的算术电路表示。 虽然基于图的ML是有用的,但由于图结构所施加的不规则存储器访问和动态并行性以及相关学习算法所需的密集计算的组合,基于图的ML对现有计算硬件(中央处理单元和图形处理单元)提出了独特的挑战,尽管基于硬件的实现非常希望能够实时处理由此类应用生成的数据流。 该项目通过基于图形的ML的新型加速器架构,沿着支持开源软件堆栈,模拟器和现场可编程门阵列(FPGA)原型来解决这些挑战。 除了技术贡献,该项目将整合到几个研究生和高年级本科课程的最新研究。该项目还将与加州大学洛杉矶分校工程与多样性卓越中心(CEED)和工程女性合作,招募高度多样化的本科生和研究生参与研究。该项目的目标是一个可编程的异构多加速器架构,具有软件控制的计算和内存资源。它专注于以下方式来满足基于图的机器学习的需求。 首先,它支持组合加速器引擎,以实现具有密集计算单元的基于图的预取的高效流水线。其次,预取硬件将与GNN算法共同设计,以支持图采样和图粗化算法的最新和即将到来的进展。第三,它将包括针对间接访问优化的高带宽暂存器架构,以及针对密集计算优化的空间计算结构(例如脉动阵列)。最后,执行模型将基于架构感知的任务并行模型,该模型具有足够丰富的原语以利用异构硬件,同时具有足够的灵活性以实现动态并行的负载平衡。 所提出的架构的关键组件将在FPGA上原型化。总的来说,这项工作的目标是在模型准确性、效率以及实时推理和学习方面大大提高基于图的机器学习的最新水平。该项目还将与DARPA的一个协同项目合作,进行相关的硬件开发。该奖项反映了NSF的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
项目成果
期刊论文数量(47)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
DSAGEN: Synthesizing Programmable Spatial Accelerators
- DOI:10.1109/isca45697.2020.00032
- 发表时间:2020-05
- 期刊:
- 影响因子:0
- 作者:Jian Weng;Sihao Liu;Vidushi Dadu;Zhengrong Wang;Preyas Shah;Tony Nowatzki
- 通讯作者:Jian Weng;Sihao Liu;Vidushi Dadu;Zhengrong Wang;Preyas Shah;Tony Nowatzki
Automated Accelerator Optimization Aided by Graph Neural Networks
图神经网络辅助的自动加速器优化
- DOI:10.1145/3490422.3502330
- 发表时间:2022
- 期刊:
- 影响因子:0
- 作者:Sohrabizadeh, Atefeh;Bai, Yunsheng;Sun, Yizhou;and Cong, Jason
- 通讯作者:and Cong, Jason
Extending High-Level Synthesis for Task-Parallel Programs
- DOI:10.1109/fccm51124.2021.00032
- 发表时间:2020-09
- 期刊:
- 影响因子:0
- 作者:Yuze Chi;Licheng Guo;Young-kyu Choi;Jie Wang;J. Cong
- 通讯作者:Yuze Chi;Licheng Guo;Young-kyu Choi;Jie Wang;J. Cong
GStarX: Explaining Graph Neural Networks with Structure-Aware Cooperative Games
GStarX:用结构感知合作游戏解释图神经网络
- DOI:
- 发表时间:2022
- 期刊:
- 影响因子:0
- 作者:Zhang, Shichang;Liu, Yozen;Shah, Neil;Sun, Yizhou
- 通讯作者:Sun, Yizhou
HOPE: High-order Graph ODE For Modeling Interacting Dynamics
- DOI:
- 发表时间:2023
- 期刊:
- 影响因子:0
- 作者:Xiao Luo;Jingyang Yuan;Zijie Huang;Huiyu Jiang;Yifang Qin;Wei Ju;Ming Zhang;Yizhou Sun
- 通讯作者:Xiao Luo;Jingyang Yuan;Zijie Huang;Huiyu Jiang;Yifang Qin;Wei Ju;Ming Zhang;Yizhou Sun
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Jason Cong其他文献
Compilation for Dynamically Field-Programmable Qubit Arrays with Efficient and Provably Near-Optimal Scheduling
具有高效且可证明接近最优调度的动态现场可编程量子位阵列的编译
- DOI:
- 发表时间:
2024 - 期刊:
- 影响因子:0
- 作者:
Daniel Bochen Tan;Wan;Jason Cong - 通讯作者:
Jason Cong
span style=font-family:; cambria,serif;font-size:12pt;=GRT: a Reconfigurable SDR Platform with High Performance and Usability/span
GRT:具有高性能和可用性的可重构 SDR 平台
- DOI:
- 发表时间:
2014 - 期刊:
- 影响因子:0
- 作者:
Tao Wang;Guangyu Sun;Jiahua Chen;Jian Gong;Haoyang Wu;Xiaoguang Li;Songwu Lu;Jason Cong - 通讯作者:
Jason Cong
Enhancing High-Level Synthesis with Automated Pragma Insertion and Code Transformation Framework
通过自动编译指示插入和代码转换框架增强高级综合
- DOI:
10.48550/arxiv.2405.03058 - 发表时间:
2024 - 期刊:
- 影响因子:0
- 作者:
Stéphane Pouget;L. Pouchet;Jason Cong - 通讯作者:
Jason Cong
RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses
RC-NVM:支持行和列存储器访问的双寻址非易失性存储器架构
- DOI:
10.1109/tc.2018.2868368 - 发表时间:
2019-02 - 期刊:
- 影响因子:3.7
- 作者:
Shuo Li;Nong Xiao;Peng Wang;Guangyu Sun;Xiaoyang Wang;Yiran Chen;Hai Li;Jason Cong;Tao Zhang - 通讯作者:
Tao Zhang
Quantum State Preparation Using an Exact CNOT Synthesis Formulation
使用精确的 CNOT 合成公式制备量子态
- DOI:
10.48550/arxiv.2401.01009 - 发表时间:
2024 - 期刊:
- 影响因子:0
- 作者:
Hanyu Wang;Daniel Bochen Tan;Jason Cong;G. Micheli - 通讯作者:
G. Micheli
Jason Cong的其他文献
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{{ truncateString('Jason Cong', 18)}}的其他基金
Collaborative Research: FET: Medium: Efficient Compilation for Dynamically Reconfigurable Atom Arrays
合作研究:FET:中:动态可重构原子阵列的高效编译
- 批准号:
2313083 - 财政年份:2023
- 资助金额:
$ 150万 - 项目类别:
Standard Grant
SHF: Medium: Automating High Level Synthesis via Graph-Centric Deep Learning
SHF:中:通过以图为中心的深度学习实现高级综合自动化
- 批准号:
2211557 - 财政年份:2022
- 资助金额:
$ 150万 - 项目类别:
Continuing Grant
CAPA: Collaborative Research: A Multi-Paradigm Programming Infrastructure for Heterogeneous Architectures
CAPA:协作研究:异构架构的多范式编程基础设施
- 批准号:
1723773 - 财政年份:2017
- 资助金额:
$ 150万 - 项目类别:
Continuing Grant
Accelerator-Rich Architectures with Applications to Healthcare
富含加速器的架构及其在医疗保健领域的应用
- 批准号:
1436827 - 财政年份:2014
- 资助金额:
$ 150万 - 项目类别:
Continuing Grant
NSF Workshop; Electronic Design Automation -- Past, Present, and Future
美国国家科学基金会研讨会;
- 批准号:
0930477 - 财政年份:2009
- 资助金额:
$ 150万 - 项目类别:
Standard Grant
Customizable Domain-Specific Computing
可定制的特定领域计算
- 批准号:
0926127 - 财政年份:2009
- 资助金额:
$ 150万 - 项目类别:
Standard Grant
Synthesis and Mapping for Application-Specific Processor Networks
特定应用处理器网络的综合和映射
- 批准号:
0903541 - 财政年份:2009
- 资助金额:
$ 150万 - 项目类别:
Standard Grant
SGER: Platforms for Future Embedded Systems
SGER:未来嵌入式系统的平台
- 批准号:
0647442 - 财政年份:2006
- 资助金额:
$ 150万 - 项目类别:
Standard Grant
International Center on Design for Nanotechnologies
国际纳米技术设计中心
- 批准号:
0530261 - 财政年份:2005
- 资助金额:
$ 150万 - 项目类别:
Continuing Grant
MSPA-MCS: Scalable Optimization Algorithms for VLSI Circuit Physical Design
MSPA-MCS:VLSI 电路物理设计的可扩展优化算法
- 批准号:
0528583 - 财政年份:2005
- 资助金额:
$ 150万 - 项目类别:
Continuing Grant
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