CAREER: van der Waals Semiconductor Integration via Surface and Interface Tailoring

随着后10nm时代的临近，硅微电子的进一步缩小变得更加困难，也更加不利。相反，具有原子厚度的范德华半导体（vdW-S）成为进一步推动摩尔定律轨迹的主要候选者。在成功合成晶圆级原材料之后，该路线图的下一个里程碑是实现更小尺寸、更高密度、更快速度和更低能耗的vdW-S集成电路。然而，现有的大块材料集成方法，如硅，会导致vdW-S的性能下降、高热量产生和许多其他问题。因此，迫切需要新的基本原理和实用方法，而本项目旨在填补这一空白。考虑到这些新兴材料的超薄性，它们的电子性能通常由表面和界面条件决定。以此为切入点，本项目致力于探索表面/界面裁剪方法，并研究相应的电子效应，以实现vdW-S在平面和三维构型下的集成。作为一个案例研究，基于已开发的原理构建的新型3D有源像素图像传感器（3D- aps）可以提供比传统同类更好的颜色感应精度，更小的设备尺寸和更高的灵敏度。因此，它展示了该项目在更广泛的应用范围内的变革性影响，例如医学成像、机器视觉和环境调查。在研究的同时，该项目强调教育责任，特别是对科学、技术、工程和数学领域代表性不足的少数群体，利用佐治亚州立大学（GSU）作为少数民族服务机构的先进地位。研究生和本科生，特别是少数民族学生，在现代材料科学、电气工程、半导体工艺和表征技术、仪器设计和制造等方面接受系统的培训。在这个过程中，他们建立了自己作为下一代劳动力的能力和职业轨迹。团队通过研讨会、会议和出版物等形式分享研究经验和成果，使项目在全国范围内产生影响。定期举办开放日、K-12学校参观和科普活动，向社会宣传最新的研究进展，提高公众对现代科学技术的认识。vdW-S器件的超大规模集成（VLSI）是其在计算、通信、医疗等领域实际应用的下一个重要主题。但是，在特定领域掺杂、接触电阻管理、材料稳定性和表征方法方面的长期挑战阻碍了实现这些目标的途径。为此，本项目旨在系统、深入地研究这些问题的解决方案，实质性地推动这些新兴半导体材料的平面和三维集成。主要的研究活动包括以下几个方面。(1)深入理解PI引入的一种表面修饰反应的电荷掺杂效应和稳定性，为平面vdW-S集成提供一种温和、精确可控、非破坏性的选择性区域掺杂方法。（ii）传统的金属到vdw - s的层间触点被新开发的具有条件接口的直接vdw - s到vdw - s （v-v）触点所取代，这为3D集成中的层间连接提供了可扩展和低电阻的解决方案。（iii）研究活动利用自制的原位和非侵入性电气和光学表征系统，以令人信服的准确性和精度检查设备的稳定性和性能。除此之外，该项目交付的3D-APS可以展示丰富的系统级物理和电子行为，否则单设备级研究是无形的，反过来，加深对复杂vdW-S框架中协同合作机制的理解。原型器件还激发了高性能微电子的后续创新，作为未来超大规模集成电路的核心功能单元，具有更小的尺寸，更高的集成密度，更快的速度和更低的能耗。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

As the post-10 nm era approaches, further shrinking of silicon microelectronics turns out to be more difficult and less beneficial. Instead, van der Waals semiconductors (vdW-S) with atomic thickness become the leading candidates to further boost the trajectory of Moore’s law. After the successful synthesis of wafer-scale raw materials, the next milestone on this roadmap is the implementation of vdW-S integrated circuits with smaller sizes, higher density, faster speed, and lower energy consumption. However, established methods for bulk material integration, such as silicon, lead to performance degradation, high heat generation, and many other issues in vdW-S. Therefore, new fundamental principles and practical methods are in urgent need, and this project is designed to fill this gap. Considering the ultra-thinness of these emerging materials, their electronic properties are typically decided by the surface and interfacial conditions. With this entry point, the project makes efforts to explore surface/interface tailoring methods and study the corresponding electronic effects for the purpose of vdW-S integration in both planar and three-dimensional (3D) configurations. As a case study, a novel 3D active pixel image sensor (3D-APS) built upon the as-developed principles can provide better color-sensing accuracy, miniature device size, and higher sensitivity than conventional counterparts. As such, it showcases the transformative impacts of this project on a broader scope of applications, such as medical imaging, machine vision, and environmental survey. Along with the research, this project emphasizes the educational responsibility, especially for the underrepresented minority groups in science, technology, engineering, and mathematics, leveraging the advanced status of Georgia State University (GSU) as a minority-serving institute. Graduate and undergraduate students, particularly minority students, receive systematic training in modern material science, electrical engineering, semiconductor process and characterization technologies, instrumentation design and manufacturing, and many more skills. In this process, they build their capabilities and career trajectories as next-generation workforces. The team shares the research experience and achievements via seminars, conferences, and publications, to bring nationwide impacts of this project. Regular open houses, K-12 school visits, and popular science activities are arranged to broadcast the latest research progress to our community, raising public awareness of modern science and technology. The very large-scale integration (VLSI) of vdW-S devices is the next essential topic for their practical applications in computing, communication, medication, and other fields. But the long-standing challenges in selected area doping, contact resistance management, material stability, and characterization methods block the pathway toward these goals. In this regard, this project is arranged to systematically and profoundly investigate the solutions to these problems, and substantially promote the planar and 3D integration of these emerging semiconductor materials. The primary research activities include the following aspects. (i) The project insightfully comprehends the charge doping effects and stability of a surface modification reaction introduced by the PI, in order to facilitate a gentle, precisely controllable, and non-destructive selected area doping approach for planar vdW-S integration. (ii) Conventional metal-to-vdW-S inter-tier contacts are replaced by newly developed direct vdW-S-to-vdW-S (v-v) contacts with conditioned interfaces, which provide a scalable and low-resistance solution for inter-tier connections in 3D integrations. (iii) The research activities leverage the home-built in-situ and non-invasive electrical and optical characterization systems to examine the devices’ stability and performance with convinced accuracy and precision. Beyond that, the 3D-APS delivered by this project can exhibit rich system-level physical and electronic behaviors that otherwise are intangible from single device-level studies, and in turn, deepen the understanding of the synergistic cooperation mechanism in complex vdW-S frameworks. The prototype devices also inspire succeeding innovations of high-performance microelectronics, as core functional units in future VLSI with smaller sizes, higher integration density, faster speed, and lower energy consumption.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.