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PARSIVAL: Parallel High-Throughput Simulations for Efficient Nanoelectronic Design and Test Validation

PARSIVAL: Parallel High-Throughput Simulations for Efficient Nanoelectronic Design and Test Validation
PARSIVAL:用于高效纳米电子设计和测试验证的并行高通量仿真
批准号:
256517186
负责人:
Professor Dr. Hans-Joachim Wunderlich
金额:
$0.0万
依托单位国家:
德国
项目类别:
Research Grants
财政年份:
2014
资助国家:
德国
项目状态:
已结题
起止时间:
2013-12-31 至 2017-12-31

项目摘要

项目成果

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中文摘要
翻译
PARSIVAL项目将通过为大规模数据并行多核处理器架构(如GPU)设计的新模型和算法,为大规模半导体系统的重大验证挑战贡献新的解决方案。重大的验证挑战不仅包括逻辑正确性等功能属性,而且越来越多地包括温度、功率、脆弱性、健壮性或老化等非功能属性。除了半导体不断增长的门数量和复杂性外,这种功能和非功能特性之间的相互依赖和相互作用超出了当今通用计算结构的模型和算法的能力。随着纳米级半导体的可变性和不确定性需要统计跨层方法来反映技术参数,甚至在最高抽象级别,问题变得更加严重。PARSIVAL将为设计和测试验证提供新的模型和算法,支持在最具创新的数据并行计算结构(如GPU)上高效执行。模型将允许低级别的详细考虑,并将它们提升到较高级别,以便提供对现实系统行为的洞察和知识。新的评估算法将利用大规模并行性来处理复杂系统以及外部和内部变化和不确定性的影响。
英文摘要
The project PARSIVAL will contribute new solutions to the grand validation challenges of highly scaled semiconductor systems by new models and algorithms designed for massively data-parallel many-core processor architectures like GPUs. The grand validation challenges do not only cover functional properties like the logical correctness but increasingly they also incorporate non-functional properties as temperature, power, vulnerability, robustness or aging. Besides the continuously growing gate count and complexity of semiconductors, the interdependencies and interplay between such functional and non-functional properties are beyond the capabilities of today's models and algorithms for general-purpose compute structures. The problem is aggravated as variability and indeterminism of nanoscaled semiconductors require statistic cross-layer approaches which reflect technology parameters even at highest abstraction levels.PARSIVAL will provide new models and algorithms for design and test validation which support an efficient execution on the most innovative data-parallel compute structures like GPUs. The models will allow detailed considerations at low level and they will elevate them to higher levels in order to provide insight and knowledge about the realistic system behavior. The new evaluation algorithms will exploit massive parallelism to cope with complex systems and the influence of external and internal variations and uncertainties.
期刊论文(6)
专著(0)
科研奖励(0)
会议论文
Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch
逻辑/时钟路径感知的高速扫描测试生成,以避免错误捕获失败并减少时钟拉伸
DOI: 10.1109/ats.2015.25
发表时间: 2015
期刊: 2015 IEEE 24th Asian Test Symposium (ATS)
影响因子: --
作者: [K. Asada, X. Wen, S. Holst, K. Miyase, S. Kajihara, M. A. Kochte, E. Schneider, H.-J. Wunderlich, J. Qian]
通讯作者: J. Qian
DOI: 10.1109/tcad.2016.2598560
发表时间: 2017-05
期刊: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
影响因子: 2.9
作者: [E. Schneider;M. Kochte;S. Holst;X. Wen;H. Wunderlich]
通讯作者: E. Schneider;M. Kochte;S. Holst;X. Wen;H. Wunderlich
High-Throughput Logic Timing Simulation on GPGPUs
GPGPU 上的高吞吐量逻辑时序仿真
DOI: 10.1145/2714564
发表时间: 2015
期刊: ACM Trans. Design Autom. Electr. Syst.
影响因子: --
作者: [Stefan Holst, Michael E. Imhof, Hans-Joachim Wunderlich]
通讯作者: Hans-Joachim Wunderlich
Analysis and mitigation or IR-Drop induced scan shift-errors
分析和缓解 IR-Drop 引起的扫描移位错误
DOI: 10.1109/test.2017.8242055
发表时间: 2017
期刊: 2017 IEEE International Test Conference (ITC)
影响因子: --
作者: [S. Holst, E. Schneider, K. Kawagoe, M. A. Kochte, K. Miyase, H.-J. Wunderlich, S. Kajihara, X. Wen]
通讯作者: X. Wen
共 6 条
    Robust ACCESS: Verification, Test, and Diagnosis of Advanced Scan Infrastructures
    • 批准号:
      259255792
    • 项目类别:
      Research Grants
    • 资助金额:
      $0.0万
    • 财政年份:
      2014
    • 负责人:
      Professor Dr. Hans-Joachim Wunderlich
    • 依托单位:
    Statistische Testalgorithmen
    • 批准号:
      22341096
    • 项目类别:
      Research Grants
    • 资助金额:
      $0.0万
    • 财政年份:
      2006
    • 负责人:
      Professor Dr. Hans-Joachim Wunderlich
    • 依托单位:
    Methoden zur Bewertung und Verbesserung der Zuverlässigkeit informationsverarbeitetender mikroelektronischer Hardware-Komponenten
    • 批准号:
      5354091
    • 项目类别:
      Research Units
    • 资助金额:
      $0.0万
    • 财政年份:
      2002
    • 负责人:
      Professor Dr. Hans-Joachim Wunderlich
    • 依托单位:
    Leistungs- und Energiebeschränkung im Selbsttest
    • 批准号:
      5173948
    • 项目类别:
      Priority Programmes
    • 资助金额:
      $0.0万
    • 财政年份:
      1999
    • 负责人:
      Professor Dr. Hans-Joachim Wunderlich
    • 依托单位:
    国内基金
    海外基金
    强流低能加速器束流损失机理的Parallel PIC/MCC算法与实现