An Individual Investigator Development Plan to Improve Undergraduate Debugging Skills and Mindset
An Individual Investigator Development Plan to Improve Undergraduate Debugging Skills and Mindset
批准号:
2321255
负责人:
John Hu
金额:
$35.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2023
资助国家:
美国
项目状态:
未结题
起止时间:
2023-09-15 至 2026-08-31
中文摘要
该项目通过了解如何在本科课程中教授电路调试,服务于半导体劳动力发展的国家利益。多亏了摩尔定律,随着晶体管数量的增加和当今芯片复杂性的增加,能够首次完美工作的新芯片越来越少。因此,高水平的工程工作被投入到调试中,这是一个识别和修复预期芯片行为和测量芯片行为之间的任何差异的过程。这个项目旨在探索沉浸式和特定领域的培训如何显著提高本科生调试复杂电路的能力,并改善他们解决问题的整体方法和心态。除了研究部分,首席调查员还将参与一项密集的专业发展计划,以扩大他在研究设计、量化方法和教育心理学方面的知识和技能。该项目的其他潜在好处包括增加就业机会和职业前景,加强产业界和学术界的合作,以及减少新产品开发中的调试时间和成本。该项目的目标是设计一项严格的先导性研究,以推断因果关系,并量化整体和特定领域的调试培训干预在多大程度上改善本科生的电路调试技能和心态。PI将采用基于设计的研究来创建干预措施,并采用准实验设计来研究影响。干预的认知部分将包括教授常见电路问题和根据行业内容改编的全局调试策略。情感部分将包括强制错误报告和为学生参与构建根本原因表而提供的额外学分激励。调试思维模式将使用已建立的工具进行衡量。调试性能将通过经过行业专家验证的定制开发工具进行测试。这个项目将增进我们对如何在大学里教授调试的理解。该项目得到了NSF的EDU核心研究:STEM教育研究能力建设(ECR:BCSER)计划的支持,该计划旨在建设研究人员开展高质量STEM教育研究的能力。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
This project serves the national interest of semiconductor workforce development by understanding how to teach circuit debugging in undergraduate courses. As the transistor count and complexity of today’s chips grow, thanks to Moore’s Law, fewer new chips can work perfectly for the first time. Hence, a high level of engineering effort is put into debugging, a process that identifies and fixes any discrepancies between the expected and measured chip behavior. This project seeks to explore how immersive and domain-specific training can significantly enhance undergraduate students’ ability to debug complex circuits and improve their overall approach and mindset to problem-solving. In parallel to the research component, the principal investigator will participate in an intensive professional development plan to expand his knowledge and skills in study design, quantitative methods, and educational psychology. Other potential benefits of this project include increased employability and career prospects, strengthened industry-academia collaboration, and reduced debug time and cost in new product development.The goal of the project is to design a rigorous pilot study to infer a causal relationship and quantify how much a holistic and domain-specific debug training intervention improves undergraduates’ circuit debugging skills and mindset. The PI will adopt design-based research to create the intervention and a quasi-experimental design to study the impact. The cognitive portion of the intervention will include teaching common circuit issues and global debugging strategies adapted from industry content. The affective component will consist of mandatory bug reporting and extra credit incentives for students to participate in building root cause tables. The debugging mindset will be measured using established instruments. The debugging performance will be tested via custom-developed tools validated by industry experts. This project will advance our understanding of how to teach debugging in college. The project is supported by NSF’s EDU Core Research: Building Capacity in STEM Education Research (ECR: BCSER) program, which is designed to build investigators’ capacity to carry out high-quality STEM education research.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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RET Site: Chip Design Experiences for Teachers to Stimulate Semiconductor Education in Oklahoma
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批准号:2206941
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项目类别:Standard Grant
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资助金额:$60.0万
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财政年份:2023
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负责人:John Hu
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依托单位:
海外基金