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Collaborative Research: CISE: Large: Cross-Layer Resilience to Silent Data Corruption

Collaborative Research: CISE: Large: Cross-Layer Resilience to Silent Data Corruption
协作研究:CISE:大型:针对静默数据损坏的跨层弹性
批准号:
2321491
负责人:
Ronald Blanton
金额:
$93.75万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2023
资助国家:
美国
项目状态:
未结题
起止时间:
2023-10-01 至 2028-09-30

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中文摘要
翻译
超大规模企业(即大型云服务提供商)在其数据中心基础设施中报告了频繁的静默数据损坏(或sdc)。sdc是软件错误,其唯一的症状是错误的结果。值得注意的是,大规模的SDCs显示出每一百万个设备中有一千个故障的错误率。与此同时,硬件制造商在商业和汽车领域分别努力实现百万分之一和接近零的次品率。制造商的目标和超大规模用户的观察结果之间的差异表明,SDCs对所有现代计算系统的可靠性,以及它们的安全性和可持续性构成了真正的威胁。该项目探讨了是否有可能为SDCs合作设计测试、检测和缓解方法,从而最大限度地减少对软件应用程序的性能影响,以及与制造和运行计算系统相关的额外碳足迹支出。该项目的主要新颖之处包括:(1)利用软件中重复出现的计算原语(例如,流行机器学习应用中的矩阵乘法)和现代专用硬件(例如,人工智能处理器)来设计特定领域的SDC解决方案;(2)利用SDC测试可以在设备的整个生命周期内在数据中心进行,而不是几秒钟到几分钟——这是对制造测试平台的严格限制;(3)将可持续性和碳足迹作为核心设计指标。这个项目的核心影响将是对我们今天委托计算系统的无数应用程序的可靠性和安全性的关键改进。第二个核心影响是计算设备寿命的提高,这对可持续计算具有重要的积极影响。研究团队还将培训学生并与行业合作伙伴合作。为了应对SDC的挑战,研究团队追求四个跨越不同领域的协同研究重点:硅器件、计算机体系结构、软件和算法。在每个推力中,团队将通过以下角度研究SDC挑战:测试、检测、缓解和安全影响。Thrust 1通过新颖的测试模式度量和连续扫描测试部署来探索设备级测试。Thrust 2研究系统级测试(改进错误检测延迟和测试覆盖率,并调整测试以更能代表数据中心工作负载)、特定于核心的测试、缺陷表征、测试和缓解的硬件支持,以及系统安全含义。推力3通过(部分)冗余、适当的扫描和系统级测试调度、测试-应用程序融合(应用程序测试自己的地方)和针对缺陷引起的漏洞的软件安全强化来研究软件检测和缓解。Thrust 4追求算法检测和缓解,特别强调为重要的数据中心工作负载(如神经网络)启用鲁棒非线性计算。该奖项反映了美国国家科学基金会的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
Hyperscalers (i.e., large cloud service providers) are reporting frequent silent data corruptions (or SDCs) within their datacenter infrastructures. SDCs are software errors for which the only symptom is an incorrect result. Remarkably, SDCs at-scale exhibit error occurrence rates on the order of one thousand faults per one million devices. Meanwhile, hardware manufacturers strive to achieve one hundred and close to zero defective parts per million for the commercial and automotive domains, respectively. This discrepancy between manufacturers’ goals and hyperscalers’ observations suggests that SDCs are a real threat to the reliability of all modern computing systems, and by extension their security and sustainability. This project explores whether it is possible to cooperatively design testing, detection, and mitigation approaches for SDCs that minimize performance impact on software applications, as well as additional carbon footprint expenditures associated with manufacturing and running computing systems. The project’s key novelties include: (1) leveraging reoccurring computational primitives in software (e.g., matrix multiplication in popular machine learning applications) and modern special-purpose hardware (e.g., Artificial Intelligence processors) to design domain-specific SDC solutions; (2) exploiting the fact that SDC testing can be performed throughout a device’s lifetime in the datacenter rather than for a few seconds to minutes — a strict limitation on the manufacturing test floor; (3) considering sustainability and carbon footprint as a core design metric. This project’s core impact will be a critical improvement in reliability and security for the countless applications to which we entrust computing systems today. A secondary core impact is an improvement in the longevity of computing devices, which has significant positive implications for sustainable computing. The research team will also train students and work with industry partners. To address the SDC challenge, the research team pursues four synergistic research thrusts that cut across diverse domains: Silicon Devices, Computer Architecture, Software, and Algorithms. Within each thrust, the team will study the SDC challenge through the lenses of: Testing, Detection, Mitigation, and Security implications. Thrust 1 explores device-level testing through novel test pattern metrics and continuous scan test deployment. Thrust 2 studies system-level testing (improving error detection latency and test coverage and adapting tests to be more representative of datacenter workloads), core-specific testing, defect characterization, hardware support for testing and mitigation, and system security implications. Thrust 3 investigates software detection and mitigation through (partial) redundancy, appropriate scan and system-level test scheduling, test-application fusion (where applications test themselves), and software security hardening against defect-induced vulnerabilities. Thrust 4 pursues algorithmic detection and mitigations with a particular emphasis on enabling robust non-linear computation for important datacenter workloads, like neural networks.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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SHF: Small: Fault Model Evaluation and Discovery
  • 批准号:
    1816512
  • 项目类别:
    Standard Grant
  • 资助金额:
    $44.63万
  • 财政年份:
    2018
  • 负责人:
    Ronald Blanton
  • 依托单位:
SHF: Small: Energy Efficient Learning on Chip with Quantized Representations
  • 批准号:
    1815899
  • 项目类别:
    Standard Grant
  • 资助金额:
    $45.0万
  • 财政年份:
    2018
  • 负责人:
    Ronald Blanton
  • 依托单位:
SHF: Small: Test Chip Design for Maximal Yield Learning
  • 批准号:
    1527606
  • 项目类别:
    Standard Grant
  • 资助金额:
    $45.0万
  • 财政年份:
    2015
  • 负责人:
    Ronald Blanton
  • 依托单位:
SHF: Large: High-Performance, Low-Power, Self-Evolving Integrated Systems through Statistical Learning in Chip (SLIC)
  • 批准号:
    1314876
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $223.74万
  • 财政年份:
    2013
  • 负责人:
    Ronald Blanton
  • 依托单位:
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Research on Quantum Field Theory without a Lagrangian Description
  • 批准号:
    24ZR1403900
  • 项目类别:
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  • 资助金额:
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  • 批准年份:
    2024
  • 负责人:
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  • 依托单位:
Cell Research
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