EAGER: Statistical Learning in Chip

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Integrated electronic systems are pervasive in all aspects of our lives, used in everything from computers to mobile phones to automobiles. However, designing and manufacturing systems that both work and are reliable is becoming extremely difficult due to the significant complexity inherent in the underlying technology. In this NSF EAGER project, we will demonstrate how statistical learning in chip (SLIC) can cope with the non-idealities that arise due to imprecise design and fabrication, and the uncertainty that stems from the system's user and operating environment. Specifically, SLIC will enable an integrated system to "learn" optimal operating points across various applications so as to maximize performance, and to minimize power consumption. This will be accomplished by developing customized statistical learning algorithms for in-chip implementation that are capable of deriving actionable information from system data produced both on- and off-line. The principal investigator (PI) is committed to having a broader impact through training a diverse group of undergraduate and graduate researchers. His research group has members from under-represented groups that include women, African Americans, Hispanic Americans, and Native Americans. In addition, as director of the Center for the Silicon System Implementation (CSSI) at Carnegie Mellon University, the PI manages a program that recruits undergrads researchers from various universities (including minority-serving institutions), and the annual convention of the National Society of Black Engineers. This program has been very successful, resulting in the recruitment of many undergraduate researchers, including both women and African-Americans. In the last few years, the PI has supervised nine undergraduate researchers, three of which were African-American (two male and one female), and will continue to recruit a diverse group of students, both at the graduate and undergraduate levels, for participation in this project.