Time-Variant Architectures and Stabilty Criteria for Incremental Sigma-Delta ADC(TASC for IADC )

增量 Sigma-Delta ADC 的时变架构和稳定性标准（TASC for IADC）

• 批准号: 288845960
• 负责人: Professor Dr.-Ing. Maurits Ortmanns
• 金额: --
• 依托单位: Institut für Mikroelektronik (Mikro)
• 依托单位国家: 德国
• 项目类别: Research Grants
• 资助国家: 德国
• 项目状态: 未结题
• 来源: https://gepris.dfg.de/gepris/projekt/288845960?language=en
• 关键词: Time; Variant; Architectures; Stabilty; Criteria

The proposed research project aims towards a systematic design process for incremental sigma-delta A/D converters. This type of A/D converter shows particular potential in the prior art, especially with small to moderate conversion rates and very high resolutions; Recent work shows that completely new, fast ADCs can work on the principle of incremental ADCs. However, previous design approaches are limited to empirical design rules, mostly apply the knowledge of continuously working, normal sigma-delta converters, do not have the option of including non-idealities, and therefore do not offer the possibility of a systematic design process. In preliminary work it was e.g. shown that this type of ADC has the potential to use time-variant architectures with time-dependent non-idealities due to the incremental working method. Low non-idealities at the beginning and high non-idealities at the end of an implementation cycle allow performance to be saved with almost the same level of performance. However, the design process for such time-variant architectures and their optimization compared to time-variant non- idealities has not yet been fully researched. In addition, the incremental sigma-delta modulator (implemented with a continuous- time loop filter) is a time- varying, mixed discrete-continuous-time system that is highly non- linear due to the internal quantization. Although many analysis methods for the stability behavior of free- running sigma-delta modulators have been described, only the simplest variant is often used in practice, which has often been shown in simulations to be unsuitable for incremental ADC. For this reason, this research project will focus not only on the optimal design process for time-variant architectures of incremental converters and the inclusion of time- variant non-idealities therein, but also on their stability behavior. Stability metrics are applied for the incremental mode of operation and compared to the usual ad-hoc metrics of free running modulators. The intention is to significantly improve the design process and ultimately the power efficiency for the circuit design of incremental Sigma Delta converters.

拟议的研究项目旨在为增量Sigma-Delta A/D转换器提供一个系统的设计过程。这种类型的A/D转换器在现有技术中显示出特别的潜力，特别是在小到中等转换率和非常高的分辨率；最近的研究表明，全新的、快速的ADC可以根据增量式ADC的原理工作。然而，以前的设计方法局限于经验设计规则，大多应用连续工作的知识，正常的Sigma-Delta转换器没有包括非理想的选项，因此没有提供系统设计过程的可能性。在初步工作中，例如表明，由于增量式工作方法，这种类型的ADC具有使用具有时变非理想性的时变结构的潜力。实施周期开始时的非理想化程度较低，实施周期结束时的非理想化程度较高，这样就可以在几乎相同的绩效水平下节省绩效。然而，时变体系结构的设计过程及其相对于时变非理想体系结构的优化还没有得到充分的研究。此外，增量Sigma-Delta调制器(用连续时间环路滤波器实现)是一个由于内部量化而高度非线性的时变、离散-连续混合系统。虽然已经描述了许多分析自激Sigma-Delta调制器稳定性的方法，但在实践中通常只使用最简单的变型，这在模拟中经常被证明不适合增量ADC。为此，本研究项目不仅将重点放在增量式变流器时变结构的优化设计过程以及在其中包含时变非理想性，而且还将关注其稳定性行为。将稳定性度量应用于增量操作模式，并将其与自由运行调制器的通常自组织度量进行比较。其目的是为增量Sigma Delta转换器的电路设计显著改进设计流程，并最终提高电源效率。