Design of Hardware Transactional Memory for Usage in Embedded Systems

用于嵌入式系统的硬件事务存储器的设计

• 批准号: 317826642
• 负责人: Professor Dr. Theo Ungerer
• 金额: --
• 依托单位: Lehrstuhl für Systemnahe Informatik und Kommunikationssysteme
• 依托单位国家: 德国
• 项目类别: Research Grants
• 财政年份: 2016
• 资助国家: 德国
• 起止时间: 2015-12-31 至 2021-12-31
• 项目状态: 已结题
• 来源: https://gepris.dfg.de/gepris/projekt/317826642?language=en
• 关键词: Design; Hardware; Transactional; Memory; Usage

Transactional Memory applies optimistic synchronization to increase parallelism and therefore execution performance on multi-core processors. Moreover, Transactional Memory simplifies programmability of parallel applications by its deadlock avoidance. While Hardware Transactional Memory is available in current desktop and server processors as e.g. Intel Haswell or IBM BlueGene/Q- and Power8 processors, implementations for embedded processors do not exist despite further beneficial properties: avoidance of priority inversion and support of fault-tolerant execution.Target of this project is to investigate the deployment of Transactional Memory in embedded systems. We will design a Hardware Transactional Memory and integrate it into a current embedded multi-core processor. The following aspects shall be systematically investigated: (1) support of real-time capable transactions optimistic synchronization of parallel tasks, (2) transaction management control for embedded systems, and (3) fault-tolerant execution by exploiting the checkpointing ability of Transactional Memory.

transmitted Memory应用乐观同步来提高并行性，从而提高多核处理器上的执行性能。此外，transmittance内存简化了可编程性的并行应用程序的死锁避免。虽然硬件transmittance存储器是在当前的桌面和服务器处理器，例如英特尔Haswell或IBM BlueGene/Q-和Power8处理器，实现嵌入式处理器不存在，尽管进一步的优点：避免优先级反转和支持容错执行。我们将设计一个硬件传输内存，并将其集成到当前的嵌入式多核处理器中。 系统地研究了以下几个方面：（1）支持实时事务的并行任务的乐观同步，（2）嵌入式系统的事务管理控制，（3）利用transmitted存储器的检查点功能实现容错执行。

项目成果

Hardware Multiversioning for Fail-Operational Multithreaded Applications

用于故障操作多线程应用程序的硬件多版本化

• DOI: 10.1109/sbac-pad49847.2020.00014
• 发表时间: 2020
• 期刊: 2020 IEEE 32nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)
• 作者: Rico Amslinger;Christian Piatka;Florian Haas;Sebastian Weis;Theo Ungerer;Sebastian Altmeyer
• 通讯作者: Sebastian Altmeyer

Investigating Transactional Memory for High Performance Embedded Systems

• DOI: 10.1007/978-3-030-52794-5_8
• 发表时间: 2020-06-12
• 期刊: Architecture of Computing Systems – ARCS 2020
• 作者: Piatka C;Amslinger R;Haas F;Weis S;Altmeyer S;Ungerer T
• 通讯作者: Ungerer T