Effective Design Methodology for Analog LSIs that Acquires and Reuses Design
Effective Design Methodology for Analog LSIs that Acquires and Reuses Design
批准号:
05452197
负责人:
TAMARU Keikichi
金额:
$4.61万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for General Scientific Research (B)
财政年份:
1993
资助国家:
日本
项目状态:
已结题
起止时间:
1993 至 1995
中文摘要
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英文摘要
We have developed an efficient design method for Analog LSIs that utilizes design procedures which are automatically acquired from a design process of a designer. We have applied the design methodology to circuit design and layout design of analog LSIs, and verified the effectiveness experimentally.Our achievements are summarized as follows.1.Development of a circuit design method that acquires and reuses design procedures.We have developed IDL (Interactive Design Language) for describing design procedures. The procedure can be reused for automatic design.2.Development of a layout design method that acquires and reuses design proceduresThe design procedure operated by a designer is stored. It is augmented with information required for generalization. Resulting procedure can be reused for generating layout under different set of parameters.3.Development of a prototype design system GUIDE that store and reuses design proceduresThe above two methods have been implemented into a prototype design system GUIDE.GUIDE system provide an interactive design environment for a designer. When he completes his desigh, his design procedure is captured in the form of IDL.It can be reused for automatic design.4.Application of the design systemTwo systems have been developed using GUIDE system. They are an automatic characterization system for LSI Libraries and a parameter extraction system of MOSFET models. Both systems are verified to be effective through the use in the development of actual LSIs.
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田丸啓吉: "中間モデルを用いたモデル依存性の小さいMOSFETパラメータ抽出手法" 電子情報通信学会論文誌A. J78-A. 1133-1141 (1995)
Keikichi Tamaru:“使用中间模型的具有较小模型依赖性的 MOSFET 参数提取方法” IEICE Transactions A. J78-A (1995)。
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K. Tamaru: "Development of Module Generators from Extracted Design Procedures- Application to Analog Device Generation-" IEICE Trans. Fundamentals. E78-A. 160-168 (1995)
K. Tamaru:“从提取的设计程序开发模块生成器 - 应用到模拟设备生成 -”IEICE Trans。
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森江隆史: "アナログ回路設計手順の保存・再利用化手法" 電子情報通信学会論文誌A. J76-A. 1457-1464 (1993)
Takashi Morie:“保存和重用模拟电路设计程序的方法”IEICE Transactions A. J76-A 1457-1464 (1993)。
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小野寺秀俊: "中間モデルを用いたモデル依存性の小さいMOSFETパラメータ抽出手法" 電子情報通信学会論文誌A. J78-A. 1133-1141 (1995)
Hidetoshi Onodera:“使用中间模型的具有较小模型依赖性的 MOSFET 参数提取方法” IEICE Transactions A. J78-A(1995)。
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H.Onodera: "Compaction with Shape Optimization" Proc.IEEE CICC. 545-548 (1994)
H.Onodera:“形状优化压实”Proc.IEEE CICC。
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共 18 条
Development of a Computing System by a Functional Memory Type Parallel Processor.
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批准号:07558039
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项目类别:Grant-in-Aid for Scientific Research (A)
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资助金额:$5.95万
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财政年份:1995
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负责人:TAMARU Keikichi
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依托单位:
Development of a Computer Specific to LSI Geometrical Processing
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批准号:04555078
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项目类别:Grant-in-Aid for Developmental Scientific Research (B)
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资助金额:$10.18万
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财政年份:1992
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负责人:TAMARU Keikichi
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依托单位:
Studies on Functional Memory Type Parallel Processor Architectures and Their Massively Parallel Algorithms.
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批准号:02452160
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项目类别:Grant-in-Aid for General Scientific Research (B)
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资助金额:$4.29万
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财政年份:1990
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负责人:TAMARU Keikichi
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依托单位:
Development of an Integrated Analog-Digital CAD System
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批准号:01850076
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项目类别:Grant-in-Aid for Developmental Scientific Research
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资助金额:$9.47万
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财政年份:1989
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负责人:TAMARU Keikichi
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依托单位:
Studies on a Hierarchical CAD System for Analog LSIs
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批准号:62460127
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项目类别:Grant-in-Aid for General Scientific Research (B)
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资助金额:$4.99万
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财政年份:1987
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负责人:TAMARU Keikichi
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依托单位:
海外基金