Precise Fine-Pattern-Etching of Resist Using Supermagnetron Plasma

随着半导体集成电路集成度的提高，对亚微米图形刻蚀提出了更高的要求。对于256MbDRAM的开发，0.2微米的精细图案刻蚀是必要的。2-5年后，将开始1 GB-4GbDRAM的研究和0.15-0.2微米精细图案蚀刻的研究。在这项为期两年的1微米厚抗蚀剂的高速刻蚀研究中，使用了大约五年前由首席研究员开发的超磁控等离子体刻蚀机，并将其应用于工业用途。通过使用低温循环器将下阴极和衬底冷却到-30ﾟC来控制蚀刻形状。上阴极覆盖一层石墨板，以防止溅射金属沉积对基片表面的污染。为了制备精细图形刻蚀，研究了在-20ﾟC左右的低阴极温度下的多种刻蚀特性，当上下阴极的射频功率相差约180ﾟ时，获得了最高的刻蚀速率和刻蚀均匀度。当氧气流量为30~50sccm时，可获得0.5~1um/min的较高刻蚀速率。利用准分子激光曝光设备在硅片上刻蚀了含硅光刻胶图形的抗蚀剂层。在0.02um的小侧壁腐蚀中，通过在-140V的自偏置电压下将晶片冷却到-20ﾟC来刻蚀具有垂直侧壁的0.25微米的线。通过研究发现，未来ULSI工艺研究的0.1微米精细图形刻蚀技术可以用超磁控等离子体来实现。

With increase of the integration density of semiconductor integrated circuits, submicron pattern etchings were required. For the development of 256MbDRAM, 0.2mum fine pattern etchings would be necessary. After 2-5 years from now, the research of 1Gb-4GbDRAM and the study of O. 15-0.2mum fine pattern etchings will be started. In this two-years study of high-rate etching of 1mum thick resist, a supermagnetron plasma etcher developed about five years ago by the head investigator was used for its application to the industry use. The etch shape was controlled by chilling the lower cathode and substrates down to -30ﾟC using a low temperature circulator. The upper cathode was covered with a graphite plate to prevent from the contamination of the substrate surface by the deposition of sputtered metals. The graphite etched by oxigen plasma changes to CO gas and never contaminate the substrate.For the preparation of fine pattern etching, many kinds of etching characteristics were investigated at the lower cathode temperature of about -20ﾟC. The highest etch-rate and etch-uniformity were obtained at the rf phase difference of about 180ﾟ between the rf powers supplied to the upper and lower cathodes. The high etch rates of 0.5-1mum/min were obtained at the O_2 gas flow rate of 30-50 sccm. The resist layers on Si wafers, patterned with Si containing photoresist by using eximer laser exposure equipment, were etched. 0.25mum lines with vertical side walls were etched within a small side wall etching of 0.02mum by chilling the wafer down to -20ﾟC at the self-bias voltage of -140V. From this study, it was found that the 0.1mum fine pattern etching technology investigated for for the future ULSI process could be realized using the supermagnetron plasma.