Computer Architecture bayed on Autonomous Reconfigurable Logic Device
基于自主可重构逻辑器件的计算机体系结构
基本信息
- 批准号:12450152
- 负责人:
- 金额:$ 4.8万
- 依托单位:
- 依托单位国家:日本
- 项目类别:Grant-in-Aid for Scientific Research (B)
- 财政年份:2000
- 资助国家:日本
- 起止时间:2000 至 2001
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
In this project, architecture and applications based on autonomous reconfigurable logic devices has been explored in order to facilitate reconfigurable computing systems.Plastic Cell Architecture (PCA) is proposed as one of extensions of programmable logic devices with the unique characteristics as follows ; asynchronous cooperation of circuits referred to as objects; pipelined communication between objects ; array of homogeneous, relocatable, and expandable cells; unification of logic and memory; and dynamic reconfiguration by itself.In order to realize above characteristics, an architecture which consists of two layers is proposed referred to as a plastic part and a built-in part. The plastic part works as a programmable logic device or a memory. The built-in part works for communications between objects, access to memories, and reconfiguration of the plastic part. PCA is expected to work faster by asynchronous pipelined communication of objects, while it is considered to be difficult to accelerate the clock cycle of a circuit implemented in conventional PLDs because of the delay of global interconnections. Furthermore, PCA is expected to be a key device for reconfigurable computing by virtue of its unique architecture and flexibility in reconfiguration.In order to facilitate such a computing system, we have explored the followings ; (1) architectural design, physical design, and VLSI implementation of PCA device ; (2) design methodology, design language, computer aided design tools, simulators, and libraries for implementation of target functions in the PCA device ; (3) methodology to manage hardware resources for dynamic reconfiguration in PCA device ; (4) applications of PCA in the field of image codec, audio codec, and communications.
本课题研究了基于自主可重构逻辑器件的体系结构及其应用,提出了可重构逻辑器件的一种扩展-塑料单元体系结构(PlasticCellArchitecture,PCA),该体系结构具有以下特点:电路间的异步协作,对象间的流水线通信,同构的、可重定位的、可扩展的单元阵列,可编程逻辑器件的可重构性等。为了实现上述特点,本文提出了一种由塑料件和内置件两层组成的结构。塑料部件用作可编程逻辑器件或存储器。内置部件用于对象之间的通信、对存储器的访问以及塑料部件的重新配置。PCA被期望通过对象的异步流水线通信来更快地工作,而由于全局互连的延迟,被认为难以加速在常规PLD中实现的电路的时钟周期。此外,PCA以其独特的结构和灵活的可重构性,有望成为可重构计算的关键器件,为了实现这样的计算系统,我们进行了以下几方面的研究:(1)PCA器件的结构设计、物理设计和VLSI实现;(2)设计方法、设计语言、计算机辅助设计工具、模拟器和用于在PCA装置中实现目标功能的库;(4)PCA在图像编解码、音频编解码、通信等领域的应用。
项目成果
期刊论文数量(32)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
H. Tsutsui, T. Izumi, T. Onoye, Y. Nakamura, et al.: "Design of JPEG2000 Encoder for Fully Scalable Image Coding"Proc. 5th World Multi-Conference on Systemics, Cybernetics and Informatics. (2001)
H. Tsutsui、T. Izumi、T. Onoye、Y. Nakamura 等人:“用于完全可扩展图像编码的 JPEG2000 编码器的设计”Proc。
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
T.Izumi,Y.Nakamura, et al.: "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture"Proc.Workshop of Synthesis And System Integration of MIxed Technologies. 1. 91-98 (2000)
T.Izumi,Y.Nakamura,等人:“逻辑函数到塑料单元架构的基于阵列的映射算法”Proc.混合技术综合与系统集成研讨会。
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
D.Murakami,T.Izumi,T.Onoye,Y.Nakamura: "A Hardware Algorithm of Dynamic Area Allocation to Circuits for Plastic Cell Architecture"Proc.Euromedia Conference. 1. 85-89 (2000)
D.Murakami、T.Izumi、T.Onoye、Y.Nakamura:“塑料单元架构电路动态区域分配的硬件算法”Proc.Euromedia Conference。
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
筒井弘,泉知論,尾上孝雄,中村行宏 他: "LUTアレイ型PLDの設計と論理関数の埋め込み手法"DAシンポジウム論文集. 1. 21-26 (2000)
Hiroshi Tsutsui、Tomoron Izumi、Takao Onoue、Yukihiro Nakamura 等:“LUT 阵列型 PLD 设计和逻辑功能嵌入方法”DA Symposium Proceedings 1. 21-26 (2000)。
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
T.Izumi, R.Kan, Y.Nakamura: "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture"IEICE Trans. Fundamentals. Vol.E83-A No.12. 2538-2544 (2000)
T.Izumi、R.Kan、Y.Nakamura:“逻辑函数到塑料单元架构的基于阵列的映射算法”IEICE Trans。
- DOI:
- 发表时间:
- 期刊:
- 影响因子:0
- 作者:
- 通讯作者:
{{
item.title }}
{{ item.translation_title }}
- DOI:
{{ item.doi }} - 发表时间:
{{ item.publish_year }} - 期刊:
- 影响因子:{{ item.factor }}
- 作者:
{{ item.authors }} - 通讯作者:
{{ item.author }}
数据更新时间:{{ journalArticles.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ monograph.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ sciAawards.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ conferencePapers.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ patent.updateTime }}
NAKAMURA Yukihiro其他文献
NAKAMURA Yukihiro的其他文献
{{
item.title }}
{{ item.translation_title }}
- DOI:
{{ item.doi }} - 发表时间:
{{ item.publish_year }} - 期刊:
- 影响因子:{{ item.factor }}
- 作者:
{{ item.authors }} - 通讯作者:
{{ item.author }}
{{ truncateString('NAKAMURA Yukihiro', 18)}}的其他基金
Developmental changes in Ca channel density and single channel conductance at the presynaptic terminal of central nervous system
中枢神经系统突触前末端Ca通道密度和单通道电导的发育变化
- 批准号:
23700474 - 财政年份:2011
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Young Scientists (B)
Developmental changes in calcium domain at the presynaptic terminal of the central synapse
中央突触突触前末端钙结构域的发育变化
- 批准号:
20700351 - 财政年份:2008
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Young Scientists (B)
Development of Coarse-Grained Dynamic Self-Reconfigurable Device aiming for Reduction of Reconfiguration Overhead
旨在减少重构开销的粗粒度动态自重构器件的开发
- 批准号:
17300016 - 财政年份:2005
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Scientific Research (B)
相似海外基金
Optimization of Multipliers for Reconfigurable Logic
可重构逻辑乘法器的优化
- 批准号:
426369132 - 财政年份:2019
- 资助金额:
$ 4.8万 - 项目类别:
Research Grants
SHF: Small: Energy Efficient Reconfigurable Logic for Ultra Low Power Ubiquitous Computing Systems
SHF:小型:适用于超低功耗普适计算系统的节能可重构逻辑
- 批准号:
1116297 - 财政年份:2011
- 资助金额:
$ 4.8万 - 项目类别:
Standard Grant
A Study of High Dependability Reconfigurable Logic Architecture
高可靠性可重构逻辑体系结构的研究
- 批准号:
23300017 - 财政年份:2011
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Scientific Research (B)
Development of aHost-Based IPS Processor with a Reconfigurable Logic for High-Speed and Low-Power Operations
开发具有可重构逻辑的基于主机的 IPS 处理器,以实现高速和低功耗操作
- 批准号:
21700064 - 财政年份:2009
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Young Scientists (B)
CSR-EHCS(EHS), SM: Development of SYMBIOTE, A Reconfigurable Logic Assisted Data Stream Management System for Multimedia Sensor Networks
CSR-EHCS(EHS)、SM:SYMBIOTE 的开发,一种用于多媒体传感器网络的可重构逻辑辅助数据流管理系统
- 批准号:
0834682 - 财政年份:2008
- 资助金额:
$ 4.8万 - 项目类别:
Standard Grant
A study of the integrated EDA tools for reconfigurable logic
可重构逻辑集成EDA工具的研究
- 批准号:
18300015 - 财政年份:2006
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Scientific Research (B)
A Study on Circuit-Specialization based on Reconfigurable Logic Devices
基于可重构逻辑器件的电路专业化研究
- 批准号:
16500029 - 财政年份:2004
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Scientific Research (C)
The Application of Reconfigurable Logic Circuits to Hard Computation Problems
可重构逻辑电路在硬计算问题中的应用
- 批准号:
13680410 - 财政年份:2001
- 资助金额:
$ 4.8万 - 项目类别:
Grant-in-Aid for Scientific Research (C)
Reconfigurable logic and Multi-bit in-memory processing with ferroelectric memristors -ReLoFeMris
使用铁电忆阻器的可重构逻辑和多位内存处理 -ReLoFeMris
- 批准号:
441909639 - 财政年份:
- 资助金额:
$ 4.8万 - 项目类别:
Priority Programmes














{{item.name}}会员




