Improving silicon grain boundaries by linking electronic material quality and device manufacturing conditions

点击翻译按钮获取中文摘要

This project develops our recent findings for improving silicon grain boundaries in electronic devices such as cheap solar cells, active matrix displays, thin-film transistors, etc. The performance of such devices and their applications have been limited mainly because no simple link between manufacturing conditions and device quality has been found. However, we recently verified a physical model description of grain boundaries on a broad range of devices, and this allows us to find such a link and to address prevailing problems from a new perspective. This will improve both the understanding and the manufacturing of such devices.