ULTRA-LOW-POWER SILICON LSI DESIGN BASED ON Eb/No-BER CHARACTERISTICS

基于 Eb/No-BER 特性的超低功耗硅 LSI 设计

基本信息

批准号：
08405027
负责人：
MASU Kazuya
金额：
$ 26.43万
依托单位：
TOHOKU UNIVERSITY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (A)
财政年份：
1996
资助国家：
日本
起止时间：
1996 至 1999
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-08405027/
关键词：
Eb No-BER characteristics ultra-low-power design CMOS circuits single electron transistor cross talk noise low supply voltage CSET inverter matched filter 高速RFバス NO-BER特性室温動作CSET クロストーク CMOS 電源電圧下限値

项目摘要

The purpose of this research project is to establish the basis of ultra low power design of nano-scale devices on the basis of "Eb/No-BER characteristics."1. Silicon CMOS test chips have been fabricated and their Eb/No-BER characteristics have been evaluated for the first time. Base on the measurement results, the minimum supply voltage for miniaturized CMOS circuits is proposed. Furthermore, cross-talk noises among the wiring interconnects have been estimated.2. "Eb/No-BER characteristics" was applied to a design of single electron transistors (SET). From simulation results, peripheral parasitic capacitance and interconnect layout have been proposed as a guiding principle of nano-scale devices based on the "Eb/No-BER characteristics".3. Complementary SET (CSET) inverter circuits were investigated from the viewpoint of room temperature operation. From the "Eb/No-BER characteristics", it has been found that room-temperature CSET is hardly implemented under up-to-date manufacturing technology.4. Instead of normal CSET, novel matched filter type CSET has been proposed for the first time from a concept of S/N recovery. CSET which consists of 3chip matched filter has been evaluated at room temperature. Although matched filter type CSET has been proved to be effective for S/N recovery, total power consumption is found to go up. After all, it is confirmed from the "Eb/No-BER characteristics" that SET circuits is applicable to low-temperature operation.Furthermore, ultra high-speed high-capacity bus lines for the next generation have been proposed and investigated.We believe that the above achievements of this research fulfill the requirements for the next generation ultra low-power high-speed ULSI circuits design.

该研究项目的目的是基于“ EB/No-Ber特征”建立纳米级设备的超低功率设计的基础。1。硅CMOS测试芯片已被制造，并首次评估了其EB/NO-BER特性。基于测量结果，提出了微型CMOS电路的最小供应电压。此外，估计接线互连之间的串扰噪声。2。 “ EB/No-Ber特性”应用于单电子晶体管的设计（SET）。从模拟结果中，已经提出了基于“ EB/No-Ber特征”的纳米级设备的指导原理。3。从室温运行的角度研究了互补集（CSET）逆变器电路。从“ EB/No-Ber特征”中，已经发现，在最新的制造技术下，几乎无法实施室温CSET.4。从S/N恢复的概念中首次提出了新型匹配的滤波器类型CSET，而不是正常的CSET。由3chip匹配的过滤器组成的CSET已在室温下评估。尽管已证明匹配的过滤器类型CSET对S/N恢复有效，但仍发现总功耗会增加。毕竟，从“ EB/NO-BER特征”中确认了设置电路适用于低温操作。FurThermore已提出和调查了下一代的超高高速高容量公交线路。我们相信，这项研究的上述成就满足了下一代超低速高速高速ulsi cimpuits的要求。