Source and drain structures for InSb MISFETs

研究了适合于短沟道InSb MISFET的源漏结构。考察了施主杂质的预沉积、硫的吸附和TiN薄膜的蒸发。采用光辐照退火法对施主掺杂进行扩散和活化。在p型InSb衬底中掺入TiN，获得了10~4的整流比。采用掺杂方法，采用自对准的方法制备了InSb MISFET。在制造后没有进行热处理的情况下，晶体管没有表现出晶体管的特性。然而，在用光照射进行退火后，晶体管工作在n沟道模式。迁移率只有几cm2/vs，这是非常小的，并且有很大的漏电流流过漏极结。通过降低热处理温度和减小栅绝缘层厚度来改进工艺，晶体管表现出高的迁移率。最大迁移率为1500 cm~2/vs。这是因为合金尖峰是在高温(30 0℃)退火过程中形成的，并且尖峰分流到结处。低温退火(200℃)似乎更适合于形成均匀的结。具有正常掩模图案的晶体管的阈值电压低于具有环形栅极图案的晶体管。这意味着栅极保护InSb界面不受光照射。因为，热损坏的MIS二极管通常在C-V特性中表现出负电压漂移。正常图案晶体管在源极和DRAM之间具有未被栅电极覆盖的通路。PASS下的InSb界面在光辐照退火过程中受到破坏，出现负阈值电压。这是栅极在退火过程中起掩模作用的证据。

Suitable source and drain structures for short channel InSb MISFETs were investigated. As donor impurity predeposition, Sulfur adsorption and thin tin film evaporation were examined. A light-irradiating anneal was used for diffusion and activation of the donor dopants. Rectify ratio of 10^4 was obtained by tin doping in p-type InSb substrates. Employing the doping method, InSb MISFETs were fabricated in self-alignment way. Without annealing after fabrication, the transistor did not show the transistor characteristics. However, after annealing with light-irradiation, the transistor was operated in n-channel mode. The mobility was a few cm^2/Vs, that is very small, and there was the large leakage current through drain junctions. Improving the process by reducing the annealing temperature and by reducing gate insulator thickness, transistors showed high mobility. The highest mobility was 1500 cm^2/Vs. This is explained by that alloy spikes were formed during high temperature annealing (300 ℃) and that the spike shunt the junction. Low temperature annealing (200 ℃) seems to be suitable for forming uniform junctions. The threshold voltage of transistors with normal mask patterns were lower than that of transistors with ring gate patterns. It means that gate electrodes protect InSb interface from light-irradiating. Because, thermally damaged MIS diodes commonly show negative voltage shift in C-V characteristics. Normal pattern transistors has the pass between source and dram which is not covered by gate electrode. The InSb interface under the pass was damaged during light-irradiating anneal and showed negative threshold voltages. This is the evidence that gate electrodes act as mask in the annealing process.