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Selective area formation and optical device application of Si islands by thermal agglomeration of SOI layers

SOI层热团聚硅岛的选择性区域形成及光学器件应用

基本信息

批准号：
13650011
负责人：
ISHIKAWA Yasuhiko
金额：
$ 2.11万
依托单位：
Shizuoka University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (C)
财政年份：
2001
资助国家：
日本
起止时间：
2001 至 2003
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-13650011/
关键词：
SOI thermal agglomeration Si islands line structure patterning waveguide selective area formation optical devices

项目摘要

In this work, thermal agglomeration of line-patterned SOI (silicon-on-insulator) structures (SOI waveguides) was studied in order to form one-dimensional periodic structure for the application to optical devices such as channel dropping filters.Selective area formation of Si islands was realized using the spatial modulation of initial SOT layer. Partial passivation with thermally grown SiO_2 was also found to be effective for the selective area islanding.As for the islanding of SOI line structures, effect of line width, SOI thickness, in-plane crystalline direction of the line pattern and fabrication process (local oxidation of Si or wet etching) was studied. As a result, annealing the SOI line structure having submicron width and thickness of 〜3 nm by the local oxidation technique was found to be deformed into island arrays aligned along two edges of line pattern with the residual Si layer between the arrays. Reflecting the fact that the alignment occurs independent of the in-plane crystalline direction of line pattern, island alignment along the line edges is maintained at 90^O-bend and T-branch of the pattern. This island array can be applied to the multiple-tunnel-junction array, since the island size is as small as 50 nm and the residual Si layer connects the islands as the tunnel capacitors.When the larger width/thickness of line pattern is prepared or when the wet etching process is used in the fabrication, the regular array is not formed. 7-nm-thick SOI layer is required for the fabrication of Si islands with the diameter of 〜100 nm, which is effective for photonic crystal applications, but in this case, the island is not aligned. Further study is necessary in this point.

本文研究了线图案SOI（silicon-on-insulator）结构（SOI波导）的热团聚，利用初始SOI层的空间调制实现了Si岛的选择性区域形成，以形成一维周期结构，用于信道分出滤波器等光学器件。对于SOI线条结构的选择性区域岛化，研究了线宽、SOI厚度、线条图形的面内晶向以及制作工艺（硅的局部氧化或湿法刻蚀）对SOI线条结构的岛化的影响。结果发现，通过局部氧化技术对具有亚微米宽度和厚度为约3 nm的SOI线结构进行退火，使其变形为沿线图案的沿着对齐的岛状阵列，阵列之间具有残留的Si层。反映出这样的事实，即取向的发生与线图案的面内结晶方向无关，沿着线边缘的岛状取向沿着保持在图案的90 ° O形弯曲和T形分支处。这种岛状阵列可以应用于多隧道结阵列，因为岛状阵列的尺寸小到50 nm，并且剩余的Si层连接岛状阵列作为隧道电容器，当制备较大宽度/厚度的线图案或当在制造中使用湿法蚀刻工艺时，不能形成规则的阵列。对于直径为100 nm的Si岛的制造，需要7 nm厚的SOI层，这对于光子晶体应用是有效的，但是在这种情况下，岛没有对准。在这一点上有必要进一步研究。