High Performance Parallel Processor System Using Three-Dimensional Processor Chip

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A new parallel processing system with shared memories was proposed. We designed a prototype system and evaluated its performance. Data to be shared are transferred to processor elements (PE's) through a high-speed multiport ring bus in this system. An optical interconnection is used as the high-speed multiport ring bus. The system performance was improved by using node-shared cache memories with three-dimensional structure which decreases the cache miss-hit rate. The performance increased almost in proportion to the number of PE.We developed two key technologies of optical interconnection and three-dimensional integration to realize the proposed system. We succeeded in fabricating the optical waveguide with an extremely low signal propagation loss of 0.029dB/cm. We achieved a high-speed data transfer rate of 10Gbps using this optical waveguide with the length of 5cm. We also developed a new beam-lead bonding technology to directly integrate photodetectors and VCSEL's on LSI chip. We fabricated a test module using these technologies in which SRAM cache memories were connected by this optical waveguide and confirmed the optical data transfer among these SRAM cache memories.Furthermore, we developed a three-dimensional integration technology based on wafer bonding. We succeeded in fabricating a three-dimensionally stacked microprocessor test chip for the first time in the world. We also fabricated a three-dimensionally stacked memory test chip with ten memory layers. In addition, we developed a new three-dimensional integration technology called a super-chip integration technology aiming to realize a further advanced system with stacked microprocessor and memory chips. We could stack various kinds of chips with different chip size and thickness by the super-chip integration.