Development of Self Aligned Fabrication Process of High-Permittivity Gate Insulating Film for Low Consumption LSI

本课题旨在建立SiO_2当量氧化层厚度(EOT)小于1.0 nm的高介电常数薄膜的自对准工艺，该工艺是通过等离子体氧化、Hf金属沉积和利用电子回旋共振(ECR)等离子体氧化Hf金属，然后通过精确控制氧气进行后沉积退火来制备的。本研究的目标是实现漏电流比SiO_2低四个数量级且界面性质与SiO_2相似的高k薄膜。研究结果总结如下：1.1.2 nm厚的SiO_2由Ar/O_2混合等离子体(最佳条件：O_2/Ar=0.1/30 scccm)制备，3 nm厚的Hf金属通过ECR溅射沉积，然后在不打破真空的情况下对Hf金属进行氧化，随后进行快速热退火。在HF氧化8.5min和650℃对…进行退火的条件下，获得了最低的1.1nmEOT值X射线光电子能谱(XPS)测量发现，沉积的HfO_x转变为HfO_2，同时SiO_2与Hf_2发生反应，导致SiO_2厚度减小，形成了Hf_2硅酸盐。为了将TaN膜用作MOSFET的栅金属，采用磁控溅射方法制备了TaN膜，并对其进行了后续的优化处理。研究发现，TaN薄膜使我们能够在低于750℃的温度下进行MOSFET制作。采用湿法化学腐蚀的方法成功地刻蚀了TaN膜，得到沟道长度为5μm~3的MOSFET。建立了以TaN为金属栅、HF氧化物为High-k绝缘膜的金属栅/高k/Si-MOSFET的制作工艺。与具有相同物理厚度的SiO_2相比，MOSFET的性能提高了40%。较少

This subject aims to establish the self-aligned process for high permittivity films having the SiO_2 equivalent oxide thickness (EOT) of less than 1.0 nm, which is fabricated by the plasma oxidation, Hf metal deposition, and oxidation of Hf metal using electron cyclotron resonance (ECR) plasma and followed by the post deposition anneals by the precise control of oxygen. The target of this study is to embody the high-k film of which the leak current is four orders of magnitude lower than that of SiO_2 and also the interface property is similar to that of SiO_2. The obtained results are summarized as follows :1.1.2 nm thick SiO_2 fabrication by Ar/O_2 mixed plasma (optimum condition : O_2/Ar=0.1/30 scccm), 3 nm thick Hf metal deposition by ECR sputtering, and subsequent oxidation of Hf metal were carried out in the chamber without breaking vacuum, which was followed by rapid thermal anneal. The lowest EOT of 1.1 nm was obtained for the Hf oxidation of 8.5 min and the annealing of 650℃ fo … More r 30 s, in which the leak current density was four orders of magnitude lower than that of SiO_2. According to XPS measurements, it was found that the deposited HfO_x changes to HfO_2 and simultaneously the decrease of SiO_2 thickness and the formation of Hf silicate occur by the reaction of SiO_2 with Hf.2.In order to use the TaN film for the gate metal of MOSFET, the TaN film was deposited by magnetron sputtering and optimized by the subsequent annealing. It was found that the TaN film enable us to use the processing at temperatures less than 750℃ in MOSFET fabrication. The etching of the TaN film was successfully established by the wet chemical etching with the Hf metal mask, leading to the MOSFET fabrication having channel length of 5 μm.3.The fabrication process for metal-gate/high-k/Si-MOSFET was well established, which was employed TaN as metal gate and Hf oxide as high-k insulating film. The MOSFET showed the 40% increment of the performance, compared with that of SiO_2 having the same physical thickness as high-k film. Less