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Constitution of Neuro-based Dynamic Memory

基于神经的动态记忆的构成

基本信息

批准号：
09450135
负责人：
NAKAJIMA Koji
金额：
$ 8.58万
依托单位：
Tohoku University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
1997
资助国家：
日本
起止时间：
1997 至 1999
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-09450135/
关键词：
Neural Network Dynamic Memory Neuro Chip Integrated Circuit Chaos Limit Cycle Non-monotonic Neuron Associative Memory 時系列情報層状回路カオス集積回路

项目摘要

The purposes of this research are analyses for behaviors of neuro-based dynamic memories, research for applications of the memories, a constitution of the memory, analyses for learning ability of the memories, a hardware integration of the memories aimed at real time processings. We analyzed the number of limit cycles generated in a single neural network by using a proposed learning algorithm. We also analyzed the characteristics of the limit cycles and transition states to the limit cycles, and characteristics of a non-monotonic neuron network which has a higher performance of learning ability. Interactions among the limit cycles, initial states, and chaotic noise were investigated on fabricated neuro-chips with integrated chaotic signal generators. In order to investigate dynamic behaviors of quantized interconnection networks on neuro-chips, we have designed and fabricated a hardware neural network according to the design rule of a CMOS technology. The 225 (and 42) full connections between 15 (and 7) neurons and the self-couplings can be performed in the fabricated neuro-chip. The number of limit cycles which can be produced on the single network increases sharply with increasing the number of neurons in case of nearest neighbor connections. For an example, 1.14x10ィイD17ィエD1 limit cycles in the case of 40 neurons are estimated at least. The limit cycles have basins of attraction, and hence, we may utilize the network as associative memeory to retrieve dynamical cyclic patterns. We also presented the quantized interconnection network to solve the N-parity problem and a random Boolean function with arbitrary N inputs. Finally, we discussed the learning possibility for the quantized interconnection networks. These results show the high performance of the neuro-based dynamic memories and the high possibility of applications of the memory as intelligent information processors.

本研究的目的是分析基于神经元的动态记忆的行为，研究动态记忆的应用，研究动态记忆的构成，分析动态记忆的学习能力，实现动态记忆的硬件集成，以实现真实的时间处理。我们分析了在一个单一的神经网络中产生的极限环的数量，通过使用一个建议的学习算法。分析了极限环和向极限环过渡的过渡态的特征，以及具有较高学习能力的非单调神经元网络的特征。在集成了混沌信号发生器的神经元芯片上研究了极限环、初始状态和混沌噪声之间的相互作用。为了研究神经芯片上量子化互连网络的动态行为，我们根据CMOS工艺的设计规则，设计并制作了一个硬件神经网络。在所制作的神经芯片中，可以实现15个（和7个）神经元之间的225个（和42个）全连接和自耦合。在最近邻连接的情况下，随着神经元数目的增加，单个网络上可能产生的极限环数目急剧增加。例如，在40个神经元的情况下，至少估计了1.14 × 10 ~（-1）D ~（17）D ~ 1极限环。极限环具有吸引盆，因此，我们可以利用网络作为联想记忆来检索动态循环模式。我们还提出了解决N-奇偶问题的量子化互连网络和具有任意N个输入的随机布尔函数。最后讨论了量子化互连网络的学习可能性。这些结果显示了基于神经元的动态存储器的高性能和存储器作为智能信息处理器的应用的高可能性。