Constitution of Neuro-based Dynamic Memory
Constitution of Neuro-based Dynamic Memory
批准号:
09450135
负责人:
NAKAJIMA Koji
金额:
$8.58万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
1997
资助国家:
日本
项目状态:
已结题
起止时间:
1997 至 1999
中文摘要
本研究的目的是对神经动态存储器行为的分析、对存储器应用的研究、对存储器的构造的分析、对存储器学习能力的分析以及对实时处理中针对的存储器的硬件集成。我们分析了在一个单一神经网络中产生的有限周期的数目,并使用一个建议的学习算法。我们还分析了极限周期的特征和过渡状态到极限周期的特征,以及非单元神经元网络的特征,其中学习能力具有更高的性能。限制周期、初始状态和混沌噪声之间的相互作用被调查为带有集成混沌信号发生器的制造神经芯片。按订购在神经芯片上调查量化互连网络的动态行为,我们已经设计和制造了一个硬件神经网络,以符合CMOS技术的设计规则。15 (和7)神经元和自接头之间的225 (和42)个完整连接可以在人造神经芯片上运行。限制周期的数量可以在单个网络上产生,并在最近邻居连接的情况下增加神经元的数量。例如,1.14 × 10-D17-D1限制周期在40个神经元的情况下估计至少有40个神经元。极限周期具有吸引力的基础,而汉斯,我们可以利用网络作为关联的记忆来恢复动态循环模式。我们还提出了一个量化的互连网络来解决N奇偶校验问题和一个具有算术N输入的随机布尔函数。最后,我们讨论了学习量化互连网络的可能性。这些结果显示了基于神经的动态存储器的高性能,以及存储器作为智能信息处理器应用的高可能性。
英文摘要
The purposes of this research are analyses for behaviors of neuro-based dynamic memories, research for applications of the memories, a constitution of the memory, analyses for learning ability of the memories, a hardware integration of the memories aimed at real time processings. We analyzed the number of limit cycles generated in a single neural network by using a proposed learning algorithm. We also analyzed the characteristics of the limit cycles and transition states to the limit cycles, and characteristics of a non-monotonic neuron network which has a higher performance of learning ability. Interactions among the limit cycles, initial states, and chaotic noise were investigated on fabricated neuro-chips with integrated chaotic signal generators. In order to investigate dynamic behaviors of quantized interconnection networks on neuro-chips, we have designed and fabricated a hardware neural network according to the design rule of a CMOS technology. The 225 (and 42) full connections between 15 (and 7) neurons and the self-couplings can be performed in the fabricated neuro-chip. The number of limit cycles which can be produced on the single network increases sharply with increasing the number of neurons in case of nearest neighbor connections. For an example, 1.14x10ィイD17ィエD1 limit cycles in the case of 40 neurons are estimated at least. The limit cycles have basins of attraction, and hence, we may utilize the network as associative memeory to retrieve dynamical cyclic patterns. We also presented the quantized interconnection network to solve the N-parity problem and a random Boolean function with arbitrary N inputs. Finally, we discussed the learning possibility for the quantized interconnection networks. These results show the high performance of the neuro-based dynamic memories and the high possibility of applications of the memory as intelligent information processors.
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Koji Nakajima: "Dynamic behaviors of an integrated circuit for recurrent neural networks"Proc. Of 1998 second Int. Conf. On knowledge-Based Intelligent Electronic Systems. 3. 260-267 (1998)
Koji Nakajima:“循环神经网络集成电路的动态行为”Proc。
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H. Tanaka, S. Sato, and K. Nakajima: "Integrated Circuits of map Chaos Generators"IEICE Trans. Fundamentals. E82-A, 2. 364-369 (1999)
H. Tanaka、S. Sato 和 K. Nakajima:“地图混沌发生器的集成电路”IEICE Trans。
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T. Harada, Y. Mizugaki, and K. Nakajima: "A new analog content addressable memory for building a new intelligent system and VLSI implementation"Proceedings of 1997 Int. Symposium on Nonlinear Theory and its Applications. Vol. 2. 869-872 (1997)
T. Harada、Y. Mizugaki 和 K. Nakajima:“用于构建新智能系统和 VLSI 实现的新型模拟内容可寻址存储器”1997 年 Int 论文集。
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Cheol-Young Park et al.: "Analog CMOS Implementation of Quantized Interconnection Neural Networks for Memorizing Limit Cycles"IEICE Trans.on Fundamentals. E82-A. 952-957 (1999)
Cheol-Young Park 等人:“用于记忆极限环的量化互连神经网络的模拟 CMOS 实现”IEICE Trans.on 基础知识。
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Tomochika Harada et al.: "A New Floating-Gate Analog Memory and An Analog Content-Adressable Memory for Building A New Intelligent System"Proc. Of the Workshop on Synthesis And System Integration of Mixed Technologies. 256-263 (1998)
Tomochika Harada 等人:“用于构建新智能系统的新型浮栅模拟存储器和模拟内容可寻址存储器”Proc。
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