INTEGRATION OF NEURAL NETWORKS USING SUPERCONDUCTIVE DEVICES
INTEGRATION OF NEURAL NETWORKS USING SUPERCONDUCTIVE DEVICES
批准号:
06555112
负责人:
NAKAJIMA Koji
金额:
$5.12万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Developmental Scientific Research (B)
财政年份:
1994
资助国家:
日本
项目状态:
已结题
起止时间:
1994 至 1995
中文摘要
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英文摘要
We have designed and fabricated three types of Josephson integrated circuits ; a 3-bit neuron-based A/D converter, an RS flip-flop circuit, and extended phase-mode logic circuits.The 3-bit neuron-based A/D converter comprises three neuron devices and three synapse devices which we have developed recently. The circuit has been integrated using a Nb/ AlOx/Nb junction process and tested with low-frequency analog input. We have presented the experimental operation in Appl. Phys. Lett. and IEEE Trans. Appl. Superconduct.The RS flip-flop, which is designed for a memory device in superconducting neural networks, is composed of two superconducting neuron devices and two fixed synapse resistors. Numerical simulation results show its high speed operation up to 50GHz, which we have presented in IEICE Trans. Electron. Experimental results have been submitted to IEEE Trans. Appl. Superconduct.The extended phase-mode logic (EPL) circuits are designed for control units in superconducting neural networks. The EPL circuits utilizes a single-flux-quantum as an information bit. Test results for an INHIBIT gate, which is one of universal operations in terms of Boolean algebra, has been published in IEEE Trans. Appl. Superconduct. Test results for a binaly counter circuit has been submitted to IEICE Trans. Electron.
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Y. Mizugaki et. al: "Neuro-Base Josephson Flip-Flop" IEICE Trans. Electron.E78-C. 531-534 (1995)
Y.水垣等。
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H.Won: "A Pulsating Neural Network" Extended Abstracts of the 1994 Int.Conf.on SSDM. 379-381 (1994)
H.Won:1994 年 Int.Conf.on SSDM 的“脉动神经网络”扩展摘要。
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