ENergy Efficient Adaptive Computing with multi-grain heterogeneous architectures (ENEAC)

具有多颗粒异构架构的节能自适应计算（ENEAC）

• 批准号: EP/N002539/1
• 负责人: Jose Nunez-Yanez
• 金额: $ 72.27万
• 依托单位: University of Bristol
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2016
• 资助国家: 英国
• 起止时间: 2016 至 无数据
• 项目状态: 已结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FN002539%2F1
• 关键词: ENergy; Efficient; Adaptive; Computing; multi

Energy efficiency is one of the primary design constraints for modern processing systems. Hardware accelerators are seen as a key technology to address the high performance with limited energy issue. In addition the arrival of computing languages such as OpenCL offer a route to the programmer to target different types of multi-core accelerators using a single source code. Performance portability is a significant challenge specially if the accelerators have different microarchitectures such as is the case in CPU-GPU-FPGA systems. This research addresses the energy and performance challenge by investigating how a device formed by processing units with different granularities ranging from coarse grain CPU cores of different complexity, medium grain general purpose GPU cores and fine grain FPGA logic cells can be dynamically programmed. The challenge is to be able to program all these resources with a single programming model and create a run-time system that can automatically tune the software to the best execution resource from energy and performance points of view. The results from this research are expected to deliver new fundamental insights to the question of: How future computers can obtain orders of magnitude higher performance with limited energy budgets?

能源效率是现代处理系统的主要设计约束之一。硬件加速器被认为是解决高性能和有限能量问题的关键技术。此外，OpenCL等计算语言的到来为程序员提供了一条使用单个源代码针对不同类型的多核加速器的途径。性能可移植性是一个重大的挑战，特别是如果加速器具有不同的微架构，如在CPU-GPU-FPGA系统的情况下。本研究解决了能源和性能的挑战，通过调查如何形成的处理单元，不同的粒度范围从粗粒度的CPU核心不同的复杂性，中等粒度的通用GPU核心和细粒度的FPGA逻辑单元可以动态编程的设备。挑战在于能够使用单个编程模型对所有这些资源进行编程，并创建一个运行时系统，该系统可以从能量和性能的角度自动将软件调整到最佳执行资源。这项研究的结果有望为以下问题提供新的基本见解：未来的计算机如何在有限的能源预算下获得数量级更高的性能？

项目成果

Sparse Matrix-Dense Matrix Multiplication on Heterogeneous CPU+FPGA Embedded System

• DOI: 10.1145/3381427.3381428
• 发表时间: 2020-01
• 期刊: Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms
• 作者: Mohammad Hosseinabady;J. Núñez-Yáñez

Reconfigurable Network Stream Processing on Virtualized FPGA Resources

• DOI: 10.1155/2018/8785903
• 发表时间: 2018-02
• 期刊: Int. J. Reconfigurable Comput.
• 作者: Qianqiao Chen;Vaibhawa Mishra;J. Núñez-Yáñez;G. Zervas

Synchronizing reconfiguration of coherent functions on disaggregated FPGA resources

在分解的 FPGA 资源上同步重新配置相干功能

• DOI: 10.1109/reconfig.2017.8279822
• 发表时间: 2017
• 作者: Chen Q

SiP-enabled FPGA Network Interface for Programmable Access to Disaggregated Data Centre Resources

支持 SiP 的 FPGA 网络接口，用于对分类数据中心资源进行可编程访问

• DOI: 10.1364/acpc.2017.su2a.78
• 发表时间: 2017
• 作者: Chen Q

A systematic approach to design and optimise streaming applications on FPGA using high-level synthesis

使用高级综合在 FPGA 上设计和优化流应用的系统方法

• DOI: 10.23919/fpl.2017.8056758
• 发表时间: 2017
• 作者: Hosseinabady M