Photonic integration using Laser interference structured substrates

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The integration of diverse semiconductor materials on a single substrate is highly desirable for future electronic and photonic devices. In particular, the integration of III-V semiconductors on silicon, the industry substrate of choice, would leverage the benefits of existing electronic device concepts based on the low-cost, large wafer size and the excellent manufacturability of silicon with III-V materials offering superior electronic and photonic performance However materials integration has remained a challenge over many years due to dissimilarities in the crystal size and other properties which need to be accommodated at the interface of these materials without propagating into the III-V layer.To address this issue, we propose a radical method to monolithically integrate III-V materials onto silicon substrates using an innovative silicon substrate nanostructuring process based on direct laser interference. The approach transforms the planar silicon surface into a highly structured array which can accommodate the differences between crystal size and type. This novel approach has potential to leverage the benefits of the monolithic integration of III-V devices on a Si-based platform, which is an essential requirement for next-generation photonic integrated circuits, III-V CMOS, and quantum devices. The project is high risk-high reward, based on incidental observations from a previous project. Some proof of principle exists, but the overall approach is yet to be fully explored. If successful, this could finally solve the problem of highly mismatched epitaxy and have transformational impact on industry, opening the prospect of integration of a wide range of alternative materials on the substrate of industry choice. The proposal seeks to develop this approach to produce high quality III-V buffer layers onto silicon. On to these III-V layers we will grow, fabricate, and test photonic devices such as laser and solar cells. The demonstration of laser operation is a critical device demonstration for off-chip optical interconnects to CMOS enabling faster connection between individual processors and overcoming a major bottleneck which will limit next-generation computing performance. The multijunction solar cell combines absorbing junctions of silicon and at least two III-V junctions. Semiconductor multijunction cells offer the highest quantum efficiency of all photovoltaics, with potential to go further and exceed 50%. However, the current technology approach means that these cells are far too expensive for consumer use. We believe we have the potential to provide a lower cost approach through our in-situ produced structured substrates, which if successful could revolutionise solar energy generation.