DEVELOPMENT OF EMBEDDED CONTROLS FOR PULSED & FT ESR

这个子项目是许多研究子项目中的一个 由NIH/NCRR资助的中心赠款提供的资源。子项目和 研究者（PI）可能从另一个NIH来源获得了主要资金， 因此可以在其他CRISP条目中表示。所列机构为 研究中心，而研究中心不一定是研究者所在的机构。 用于脉冲和FT-ESR光谱的实时控制（RTC）系统的开发最近取得了第二个里程碑。该系统包括脉冲ESR光谱仪计时系统所需的所有基本功能，成本低于2，500美元。这个系统比以前的版本先进得多。它具有体积小、功耗低的特点。RTC容量由我们设计的基于SHARC DSP的处理器板提供，该处理器板通过专有的160 MB/s总线协调多个硬件卡的功能。所有卡都是在ACERT使用表面贴装技术设计和制造的多层PCB。 最新版本可以提供多达8个脉冲的脉冲序列，相位循环重复率高达500 kHz。 脉冲序列可以在10-20微秒内更新，因此能够快速扫描，仅受PC主机中数字转换器的限制。 目前，上位机与DSP之间的通信是基于RS232接口的。USB2.0或专有串行高速链路正在开发中。 我们的未来计划是使用ADI公司的更快DSP处理器和配套FPGA，以消除DSP的一些控制任务，然后DSP将负责控制脉冲序列时序并与AP 240中的数据捕获过程同步。将增加DSP存储器，以便对脉冲序列的每个时间步长进行微调。 光谱仪的控制是基于一个图形用户界面编写的Visual C++。 AP 240的自定义功能提供外部控制线，用于在加法和减法之间切换。这一特性将使我们在未来的工作中能够在20 ms内捕获整个2D-ELDOR信号，并根据蛋白质折叠的停流和连续流实验的要求，在真实的时间内积累它。

This subproject is one of many research subprojects utilizing the resources provided by a Center grant funded by NIH/NCRR. The subproject and investigator (PI) may have received primary funding from another NIH source, and thus could be represented in other CRISP entries. The institution listed is for the Center, which is not necessarily the institution for the investigator. The second milestone in the development of a real-time control (RTC) system for pulsed and FT-ESR spectroscopy was recently passed. The system comprises all basic features required for a pulsed ESR spectrometer timing system with a cost of under $2,500. This system is much more advanced compared to earlier versions. It features small size and low power consumption. RTC capacity is provided by a processor board of our design based on SHARC DSP, which coordinates the functions of several hardware cards via a proprietary 160 MB/s bus. All cards are multi-layer PCBs designed and fabricated at ACERT using surface-mount technology. The latest version can supply pulse sequences of up to 8 pulses with phase cycling at repetition rates of up to 500 kHz. The pulse sequence can update in 10-20 microseconds, and is thus capable of fast sweeps limited only by the digitizer residing in the PC host. Currently, communication between the host PC and the DSP is based on the RS232 interface. A USB2.0 or proprietary serial high-speed link is under development. Our future plans are to use a faster DSP processor from Analog Device with companion FPGA to remove some control tasks from the DSP, which will then be tasked with control over pulse sequence timing and synchronization with the data capture process in AP240. The DSP memory will be increased to hold fine adjustments for every time step of the pulse sequence. Spectrometer control is based on a GUI written in Visual C++. A custom feature of the AP240 provides external control lines for switching between addition and subtraction. This feature will allow us in future work to capture the whole 2D-ELDOR signal in 20 ms and accumulate it in real time as required in stop-flow and continuous flow experiments on protein folding.