High speed broadband circuits

点击翻译按钮获取中文摘要

We propose the exploration of the maximum bandwidth achievable over a copper backplane considering effects caused by connectors, vias, stubs, etc. While higher speed will be the main topic, this study may include a number of related or secondary issues in future generations of equalization. These could include increasing the physical distance of transmission and better dispersion coverage, better analog performance including lower power, lower area and higher bandwidth, inclusion of transmit side sophistication such as pre-emphasis, duo-binary, PAM signaling. As a starting point, we expect to explore the limitations of the currently used technology and circuits, both from our previous experience and from the literature, in achieving higher speed and better performance, and while doing so expect to come up with some interesting circuits or architectures. A possible outcome of this work could be that we conclude that a different process is required to meet our objectives. As part of this, we expect to explore other alternatives, for example, an exploration of the use of on-chip inductors to form the basis of delay elements and as peaking circuits. At lower frequencies, e.g., 10 Gbit/s, inductors tend to take up a lot of die area so their use is limited.  However, at higher frequencies, LC circuits are more feasible while at the same time, active circuit components are experiencing a loss of quality. At some frequency, it may be advantageous to use LC circuits and our research will be used to determine where such a crossover occurs.  As a related issue, this research will examine fundamental limitations of inductors to see if inductors can be made smaller, for example through the use of multiple layers or differential structures, if inductors can be placed closer together, for example by better shielding or by deliberately allowing them to be coupled, and under which circumstances active circuitry can be placed in close proximity, or even underneath inductors.  Such a study would also include a study of on-chip coupling and cross talk and techniques such as shielding to improve isolation.