Scaling chip-to-chip interfaces for next-generation communication equipment

扩展下一代通信设备的芯片间接口

• 批准号: 505827-2016
• 负责人: ChanCarusone, Anthony
• 金额: $ 10.41万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Collaborative Research and Development Grants
• 财政年份: 2018
• 资助国家: 加拿大
• 起止时间: 2018-01-01 至 2019-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=647097
• 关键词: Scaling; chip; interfaces; next; generation

The modern era is characterized by pervasive connectivity and ambient intelligence, with every device connected to a network. Total network traffic in Canada is slated to double over 2015 levels by 2020 and globally there will be 26.3 billion networked devices in 2020, up from 16.3 billion in 2015. These increasing demands must be satisfied without increasing the cost, complexity and power dissipation of the associated electronics. The 260+ TWh/yr worldwide energy consumption of communication infrastructure continues to grow at a frightening 10.4% annually. The trend is reflected in the evolution of chip-to-chip interface standards, where the specified data rates double every 4 years. Hence, the power consumption and cost of digital input-output (I/O) circuits that shuttle bits between chips threatens to bottleneck overall progress in digital communication unless research progress continues.****This project explores electronic integrated circuits and systems to reduce the cost and power consumption of digital interfaces between chips over distances of a millimeter up to 100's of centimeters. Circuits and systems for these interfaces will be developed in nanoscale (below 20nm) CMOS technologies to permit their integration within the digital processors that drive infrastructure networking and computing. Prototyping and testing the circuits and systems in such technologies will provide unique training for graduate students, and enhance the work's commercial relevance and impact. The research will be undertaken in collaboration with researchers from Huawei Canada's R&D centres in Markham and Ottawa. Huawei's R&D teams in Ontario are market leaders in this field; their work has defined interfaces that carry data across the major mobile and fixed networks in Canada and around the world. Hence, this project offers outstanding training opportunities and enhanced competitiveness for the Canadian partner company, with the potential for vast impact lowering the cost and power consumption of the communication equipment upon which Canada increasingly relies.**

现代时代的特征是普遍的连通性和环境智能，每个设备都连接到网络。 到2020年，加拿大的总网络流量将超过2015年的两倍，在全球范围内，2020年将有263亿个网络设备，高于2015年的163亿美元。这些需求必须满足这些需求，而不会增加相关电子产品的成本，复杂性和功率消散。 通信基础设施的260+ TWH/年全球能源消耗每年继续以令人恐惧的10.4％增长。 趋势反映在芯片到芯片界面标准的演变中，其中指定的数据率每4年翻一番。因此，除非芯片之间的延伸，否则数字输入输出（I/O）电路的功耗和成本可能会使瓶颈在数字通信的整体进展中可能会进行整体进展。 这些接口的电路和系统将在纳米级（低于20nm）的CMOS技术中开发，以允许它们在驱动基础架构网络和计算的数字处理器中集成。 这些技术中的电路和系统的原型和测试将为研究生提供独特的培训，并增强作品的商业意义和影响。 这项研究将与加拿大华为在马克汉姆和渥太华的研发中心的研究人员合作进行。 华为在安大略省的研发团队是该领域的市场领导者。他们的工作定义了界面，这些界面在加拿大和世界各地的主要移动网络和固定网络中载有数据。 因此，该项目为加拿大合作伙伴公司提供了出色的培训机会，并增强了竞争力，并有可能降低加拿大越来越依赖的通信设备的成本和功耗。**