Scaling chip-to-chip interfaces for next-generation communication equipment

扩展下一代通信设备的芯片间接口

• 批准号: 505827-2016
• 负责人: ChanCarusone, Anthony
• 金额: $ 10.41万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Collaborative Research and Development Grants
• 财政年份: 2018
• 资助国家: 加拿大
• 起止时间: 2018-01-01 至 2019-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=647097
• 关键词: Scaling; chip; interfaces; next; generation

The modern era is characterized by pervasive connectivity and ambient intelligence, with every device connected to a network. Total network traffic in Canada is slated to double over 2015 levels by 2020 and globally there will be 26.3 billion networked devices in 2020, up from 16.3 billion in 2015. These increasing demands must be satisfied without increasing the cost, complexity and power dissipation of the associated electronics. The 260+ TWh/yr worldwide energy consumption of communication infrastructure continues to grow at a frightening 10.4% annually. The trend is reflected in the evolution of chip-to-chip interface standards, where the specified data rates double every 4 years. Hence, the power consumption and cost of digital input-output (I/O) circuits that shuttle bits between chips threatens to bottleneck overall progress in digital communication unless research progress continues.****This project explores electronic integrated circuits and systems to reduce the cost and power consumption of digital interfaces between chips over distances of a millimeter up to 100's of centimeters. Circuits and systems for these interfaces will be developed in nanoscale (below 20nm) CMOS technologies to permit their integration within the digital processors that drive infrastructure networking and computing. Prototyping and testing the circuits and systems in such technologies will provide unique training for graduate students, and enhance the work's commercial relevance and impact. The research will be undertaken in collaboration with researchers from Huawei Canada's R&D centres in Markham and Ottawa. Huawei's R&D teams in Ontario are market leaders in this field; their work has defined interfaces that carry data across the major mobile and fixed networks in Canada and around the world. Hence, this project offers outstanding training opportunities and enhanced competitiveness for the Canadian partner company, with the potential for vast impact lowering the cost and power consumption of the communication equipment upon which Canada increasingly relies.**

现代时代的特点是无处不在的连接和环境智能，每个设备都连接到网络。到2020年，加拿大的网络总流量预计将比2015年翻一番，到2020年，全球将有263亿联网设备，高于2015年的163亿。必须在不增加相关电子器件成本、复杂性和功耗的情况下满足这些不断增长的需求。全球通信基础设施每年260多太瓦时的能源消耗继续以每年10.4%的惊人速度增长。这一趋势反映在芯片到芯片接口标准的演变中，其中指定的数据速率每4年翻一番。因此，在芯片之间传输比特的数字输入输出（I/O）电路的功耗和成本威胁到数字通信的整体进步，除非研究继续取得进展。****该项目探索电子集成电路和系统，以降低芯片之间距离从一毫米到100厘米的数字接口的成本和功耗。这些接口的电路和系统将采用纳米级（低于20nm） CMOS技术开发，以便将其集成到驱动基础设施网络和计算的数字处理器中。这些技术中的电路和系统的原型和测试将为研究生提供独特的培训，并增强工作的商业相关性和影响。这项研究将与华为加拿大公司位于马卡姆和渥太华的研发中心的研究人员合作进行。华为在安大略省的研发团队是该领域的市场领导者；他们的工作定义了在加拿大和世界各地的主要移动和固定网络上传输数据的接口。因此，该项目为加拿大合作伙伴公司提供了良好的培训机会，增强了竞争力，对降低加拿大日益依赖的通信设备的成本和功耗具有巨大的影响