RTL-based synthetic circuit generation for the evaluation of advanced computer-aided design algorithms and integrated circuits
RTL-based synthetic circuit generation for the evaluation of advanced computer-aided design algorithms and integrated circuits
批准号:
478746-2015
负责人:
Wilton, Steven
金额:
$0.52万
依托单位国家:
加拿大
项目类别:
Collaborative Research and Development Grants
财政年份:
2015
资助国家:
加拿大
项目状态:
已结题
起止时间:
2015-01-01 至 2016-12-31
中文摘要
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英文摘要
We will investigate techniques to automatically generate synthetic circuits that can be used to evaluate Computer-Aided Design (CAD) tools, commonly used in the manufacture of integrated circuits (ICs). Companies that develop these tools need to evaluate their algorithms, and the only effective way to do this is to test them using "benchmark" user circuits. Obtaining these example circuits is difficult. An alternative is to employ a "circuit generator" which can generate synthetic structures that have many of the properties of real circuits. Although there have been previous circuit generators, they all create circuits at a low-level of abstraction (at the gate level). However, most CAD tools today process circuits at the Register Transfer Level (RTL) which is a higher level of abstraction; evaluating the algorithms used in these tools can only use previous generators to a limited extent. In this project, we will develop a circuit generator that creates circuits at this higher level of abstraction.
Creating such a generator requires the efficient manipulation of circuits at the RTL. Invionics, a Vancouver-based company, produces a platform which provides an Application Programming Interface (API) that allows designers to quickly and easily create applications that manipulate circuits at this level. In this project, researchers at Invionics and the University of British Columbia will work together to investigate how Invionics' platform can be used to support the creation of such a circuit generator.
The outcome of this research will be threefold: (1) the circuit generator will be made available, free of charge, to researchers to use as part of their experimental platform, (2) the circuit generator will serve as a reference design for Invionics customers, allowing them to better understand how to use the Invionics platform, and (3) the generator will be useful within Invionics as the company further develops their platform.
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项目类别:Discovery Grants Program - Individual
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资助金额:$8.45万
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财政年份:2021
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项目类别:Discovery Grants Program - Individual
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项目类别:Discovery Grants Program - Individual
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资助金额:$4.23万
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负责人:Wilton, Steven
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依托单位:
Bringing Field-Programmable Gate Arrays to the Masses: Towards a Design Eco-System
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批准号:RGPIN-2017-04683
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项目类别:Discovery Grants Program - Individual
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资助金额:$4.23万
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财政年份:2017
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依托单位:
New Architectures and CAD Algorithms for Field-Programmable Logic Fabrics
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资助金额:$3.06万
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财政年份:2016
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依托单位:
New Architectures and CAD Algorithms for Field-Programmable Logic Fabrics
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批准号:194238-2012
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项目类别:Discovery Grants Program - Individual
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资助金额:$3.06万
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财政年份:2015
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负责人:Wilton, Steven
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依托单位:
Raising the Abstraction of Analysis, Debug and Optimization of High-Level Synthesis-Generated Hardware
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项目类别:Strategic Projects - Group
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资助金额:$7.26万
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财政年份:2015
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负责人:Wilton, Steven
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依托单位:
Raising the Abstraction of Analysis, Debug and Optimization of High-Level Synthesis-Generated Hardware
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批准号:447002-2013
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项目类别:Strategic Projects - Group
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资助金额:$7.22万
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财政年份:2014
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负责人:Wilton, Steven
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依托单位:
New Architectures and CAD Algorithms for Field-Programmable Logic Fabrics
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批准号:194238-2012
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项目类别:Discovery Grants Program - Individual
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资助金额:$3.06万
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财政年份:2014
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负责人:Wilton, Steven
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依托单位:
Raising the Abstraction of Analysis, Debug and Optimization of High-Level Synthesis-Generated Hardware
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批准号:447002-2013
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项目类别:Strategic Projects - Group
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资助金额:$7.25万
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财政年份:2013
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负责人:Wilton, Steven
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依托单位:
Novel algorithms for routing spare wiring structures into integrated circuits
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批准号:448506-2013
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项目类别:Engage Grants Program
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资助金额:$1.2万
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财政年份:2013
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负责人:Wilton, Steven
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依托单位:
New Architectures and CAD Algorithms for Field-Programmable Logic Fabrics
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批准号:194238-2012
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项目类别:Discovery Grants Program - Individual
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资助金额:$3.06万
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财政年份:2013
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负责人:Wilton, Steven
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依托单位:
New Architectures and CAD Algorithms for Field-Programmable Logic Fabrics
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批准号:194238-2012
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项目类别:Discovery Grants Program - Individual
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资助金额:$3.06万
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财政年份:2012
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负责人:Wilton, Steven
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依托单位:
New architectures and computer-aided design algorithms for programmable logic
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批准号:194238-2006
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项目类别:Discovery Grants Program - Individual
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资助金额:$2.5万
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财政年份:2011
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负责人:Wilton, Steven
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依托单位:
Low energy FPGA architectures and algorithms
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批准号:428513-2011
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项目类别:Collaborative Research and Development Grants
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资助金额:$1.24万
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财政年份:2011
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负责人:Wilton, Steven
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依托单位:
New architectures and computer-aided design algorithms for programmable logic
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批准号:194238-2006
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项目类别:Discovery Grants Program - Individual
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资助金额:$2.5万
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财政年份:2010
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负责人:Wilton, Steven
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依托单位:
Programmable logic based post-silicon debug infrastructure
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批准号:381424-2009
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项目类别:Idea to Innovation
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资助金额:$4.37万
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财政年份:2010
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负责人:Wilton, Steven
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依托单位:
Memory footprint and run-time scalability for FPGA CAD algorithms
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批准号:362380-2007
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项目类别:Collaborative Research and Development Grants
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资助金额:$0.96万
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财政年份:2009
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负责人:Wilton, Steven
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依托单位:
Programmable logic based post-silicon debug infrastructure
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批准号:381424-2009
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项目类别:Idea to Innovation
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资助金额:$9.11万
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财政年份:2009
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负责人:Wilton, Steven
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依托单位:
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