Bridging the Programmability Gap of Compute Accelerators

缩小计算加速器的可编程性差距

• 批准号: RGPIN-2015-05762
• 负责人: Abdelrahman, Tarek
• 金额: $ 1.75万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2015
• 资助国家: 加拿大
• 起止时间: 2015-01-01 至 2016-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=590624
• 关键词: Bridging; Programmability; Gap; Compute; Accelerators

The past few years have seen increasing interest in compute accelerators—massively parallel devices that have the potential to deliver high performance at low power. This increasing interest is driven by the proliferation of smart phones and tablets, where users demand more functionality and longer battery life. It is also driven by the continual need to solve computationally intensive problems in many domains, such as big data processing, computational finance, environmental modeling, bioinformatics and physical design. This research focuses on two types of compute accelerators: Graphics Processing Units (GPUs) and Field Programmable Gate Arrays (FPGAs).

在过去的几年里，人们对计算加速器的兴趣越来越大，这种大规模并行设备有可能以低功耗提供高性能。这种日益增长的兴趣是由智能手机和平板电脑的激增驱动的，用户需要更多的功能和更长的电池寿命。这也是由于在许多领域不断需要解决计算密集型问题，如大数据处理，计算金融，环境建模，生物信息学和物理设计。本研究的重点是两种类型的计算加速器：图形处理单元（GPU）和现场可编程门阵列（FPGA）。