Enhancing Hardware Compilation for Reconfigurable Architectures using Machine Learning and Cloud Computing

使用机器学习和云计算增强可重构架构的硬件编译

• 批准号: RGPIN-2017-04232
• 负责人: Kapre, Nachiket
• 金额: $ 2.4万
• 依托单位: University of Waterloo
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2017
• 资助国家: 加拿大
• 起止时间: 2017-01-01 至 2018-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=637194
• 关键词: Enhancing; Hardware; Compilation; Reconfigurable; Architectures

Reconfigurable computing architectures, such as FPGAs (Field Programmable Gate Arrays), are enjoying a widespread renaissance, particularly in the lucrative cloud computing market. FPGAs are application-specific computing chips that allow implementation of circuits that are fully tailored to a specific problem, resulting in high performance and improved energy efficiency. Software companies like Microsoft have integrated FPGAs into their data center services through the highly influential Catapult project that uses FPGAs for accelerating both computations and network processing. Hardware manufacturers like Intel have developed new computing chips for these markets that combine processors and FPGAs.

可重构计算架构，如FPGA（现场可编程门阵列），正在广泛复兴，特别是在利润丰厚的云计算市场。FPGA是专用计算芯片，允许实现完全针对特定问题定制的电路，从而实现高性能和提高能效。像微软这样的软件公司已经通过极具影响力的Catapult项目将FPGA集成到他们的数据中心服务中，该项目使用FPGA来加速计算和网络处理。像英特尔这样的硬件制造商已经为这些市场开发了新的计算芯片，将联合收割机处理器和FPGA结合在一起。