Further Development and Evaluation of an Automated Image Analysis Pipeline for Semiconductor Circuit Reverse Engineering

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The objective of this proposal is to develop a software tool consisting of a suite of image analysis techniques tohelp automate the detection of patents infringement related to circuitry in integrated circuits (ICs). Ourproposed software will aid in automating the process of circuit extraction, where an IC is reverse engineered todetermine the exact construction and design of its electronic circuitry. Circuit extraction is sometimes requiredto determine infringement of patent(s). The process of circuit extraction is performed by individually removinglayers of circuitry of an IC, imaging the layers using a scanning electron microscope (SEM), and analysingSEM images of the IC layout to reconstruct the circuit schematics. One of the main bottlenecks in the existingapproach is the accurate segmentation of the precise IC layout from SEM images, because minute errors insegmentation usually lead to significant errors in the reconstructed IC schematics. Image intensitythreshold-based methods, such as the one used currently by TechInsights to segment the SEM images tends toperform poorly under image noise, requires tedious manual inspection and correction and consequently resultsin increased production costs. In the previous NSERC Engage project, we developed an image-analysispipeline, which consisted of an image normalization method, two image filters and two image segmentationmethods for wires and vertical interconnect accesses (VIAs). The preliminary results indicated that thesegmentation results obtained using the developed pipeline, as compared to the methods currently used byTechInsights, provided more accurate segmentations of the IC layout. In this proposed NSERC Engage Plusproject, we will expand the recently developed pipeline to address the following remaining challenges: 1)utilizing not only SEM images created using backscattered electrons, but also the ones created using secondaryelectrons; 2) requiring two separate algorithms for segmenting wires and VIAs lead to inferior results due toimage artifacts; 3) choosing optimized parameters for a given SEM image dataset; and 4) the longcomputational time of the level set segmentation method. We will develop a multi-region segmentation method