Development of automated image analysis pipeline for semiconductor circuit reverse engineering

半导体电路逆向工程自动图像分析管道的开发

• 批准号: 500395-2016
• 负责人: Ukwatta, Eranga
• 金额: $ 1.82万
• 依托单位: Carleton University
• 依托单位国家: 加拿大
• 项目类别: Engage Grants Program
• 财政年份: 2016
• 资助国家: 加拿大
• 起止时间: 2016-01-01 至 2017-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=608076
• 关键词: Development; automated; image; analysis; pipeline

The objective of this proposal is to develop a software tool consisting of image analysis techniques to help automate the detection of infringement of patents related to circuitry in integrated circuits (ICs). Our proposed software will aid in automating the process of circuit extraction, where an IC is reverse engineered to determine the exact construction of its electronic circuitry. Circuit extraction exposes the design of an IC, and is sometimes required in order to determine if there has been infringement of a patent. The process of circuit extraction is performed by individually removing layers of circuitry of an IC, imaging them using an electron microscope, and analysing microscopic images of the IC layout to reconstruct the circuit schematics. One of the main bottlenecks in the existing approach is the accurate segmentation of the precise IC layout, because minute errors in segmentation usually lead to significant errors in reconstructed IC schematics. Currently, TechInsights uses image intensity threshold-based methods for this segmentation, which tend to perform poorly under image noise, requiring tedious manual inspection and correction, resulting in increased production cost. In this project, we will determine the feasibility of incorporating state-of-the-art image segmentation methods to address some key technical challenges in analysis of IC layout in electron microscopic images. In conjunction with our industrial partner, TechInsights, we intend to increase the accuracy and speed of this segmentation by developing a new image segmentation method and an automated mechanism to alert the operator on errors in segmentation. In the proposed approach, as compared to threshold-based methods, boundary regularization along with image information will be incorporated into the segmentation to increase the robustness to image noise and regional variations in image intensity. A second tool would attempt to determine the validity of segmented IC layout using a library of design-specification rules. These two tools will ensure improved

该提案的目的是开发一种包含图像分析技术的软件工具，以帮助自动检测与集成电路（IC）电路相关的专利侵权行为。我们提出的软件将有助于自动化电路提取过程，其中IC被反向工程以确定其电子电路的确切结构。电路提取暴露了IC的设计，有时需要确定是否存在专利侵权。电路提取的过程是通过单独去除IC的电路层，使用电子显微镜对其进行成像，并分析IC布局的显微图像以重建电路原理图来执行的。现有方法的主要瓶颈之一是精确的IC布局的准确分割，因为分割中的微小误差通常会导致重构IC原理图中的重大错误。目前，TechInsights使用基于图像强度阈值的方法进行这种分割，这种方法在图像噪声下往往表现不佳，需要繁琐的手动检查和校正，导致生产成本增加。在这个项目中，我们将确定结合国家的最先进的图像分割方法，以解决在电子显微镜图像中的IC布局分析的一些关键技术挑战的可行性。与我们的工业合作伙伴TechInsights合作，我们打算通过开发一种新的图像分割方法和一种自动化机制来提醒操作员分割错误，从而提高这种分割的准确性和速度。与基于阈值的方法相比，在所提出的方法中，边界正则化将沿着图像信息纳入分割中，以提高对图像噪声和图像强度区域变化的鲁棒性。第二种工具将尝试使用设计规范规则库来确定分段IC布局的有效性。这两个工具将确保改进