Atomic-Scale Electronics

原子级电子学

• 批准号: RGPIN-2018-05969
• 负责人: Voinigescu, Sorin
• 金额: $ 9.32万
• 依托单位: University of Toronto
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2022
• 资助国家: 加拿大
• 起止时间: 2022-01-01 至 2023-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=751667
• 关键词: Atomic; Scale; Electronics

The progression of CMOS transistors and technology is expected to reach 5nm gate length by the year 2030. At these dimensions and beyond, many of the properties of bulk materials, including the bandgap, the energy band diagrams, and carrier mobilities, undergo dramatic changes and tunneling dominates. Coincidentally, room-temperature tunneling-based coupled quantum-dot (QD) devices, envisioned for quantum computing (QC), will also become feasible at these dimensions. Although integration density has continued to follow Moore's law due to feature size shrinking and the introduction of 3D transistor structures such as the FinFET, MOSFETs are fast approaching their scaling limits. This will affect the future evolution of both computing and wireless communication, the pillars of today's revolution in data science, machine learning and the internet of things, which rely on ever-increasing computational power and data rates, and on ambient sensing. To continue computing speed and functionality improvement beyond the end of CMOS, it is critical that a variety of channel materials and qubit structures suitable for integration in a production silicon platform be thoroughly investigated for large volume and low-cost, scalable QC qubits and integrated circuits.This proposal addresses (i) the continued scaling of computational power by exploring novel atomic-scale quantum-computing (QC) hardware in CMOS foundry processes, which can be integrated on the same die with classical CMOS logic and millimeter-wave electronics, and (ii) transceiver architectures exploiting the un-chartered 140-300 GHz frequency band for qubit spin control/readout, ambient sensing, instrumentation, and wireless communications at over 100 Gb/s.The proposed qubit ICs consist of coupled-QD electron and hole spin qubits, placed in the atomic-scale channel of multi-gate n- and p-MOSFETs, and of 60-240GHz spin control and spin readout circuits integrated on the same die. As a radical breakthrough, the fabricated qubits will feature mode energy level splitting on the order of 0.25-1 meV corresponding to Rabi frequencies in the 60-240GHz range, suitable for operation at 312 degrees Kelvin, two orders of magnitude higher than today's qubits. The tuned mm-wave circuits allow for 10-20ps spin control pulses which help to filter out wideband thermal noise and make the proposed qubits and QC logic more tolerant of short spin coherence and relaxation times. Thermal noise filtering may lead to even higher temperature operation for a given energy-level splitting.

预计到2030年，CMOS晶体管和工艺的进步将达到5 nm栅长。在这些维度和更远的维度上，块状材料的许多性质，包括带隙、能带图和载流子迁移率，都经历了戏剧性的变化，隧道效应占主导地位。巧合的是，基于室温隧道的耦合量子点(QD)器件，设想用于量子计算(QC)，也将在这些维度变得可行。尽管由于特征尺寸的缩小和3D晶体管结构(如FinFET)的引入，集成密度继续遵循摩尔定律，但MOSFET正在快速接近其比例限制。这将影响计算和无线通信的未来发展，这两个领域是当今数据科学、机器学习和物联网革命的支柱，它们依赖于不断增长的计算能力和数据速率，以及环境传感。为了使计算速度和功能得到持续的提高，使计算速度和功能得到进一步的提高，必须对适合于集成在生产硅平台中的各种沟道材料和量子位结构进行彻底的研究，以获得大容量、低成本、可扩展的QC量子位和集成电路。该方案解决了(I)通过探索新型的原子级量子计算(QC)硬件来继续扩展计算能力，所述新的原子级量子计算(QC)硬件可以与经典的CMOS逻辑和毫米波电子学集成在同一芯片上；以及(Ii)利用未被特许的140-300 GHz频带用于量子位自旋控制/读出、环境传感、仪器测量、和100 Gb/s以上的无线通信。所提出的量子比特IC由耦合的Qd电子和空穴自旋量子比特组成，放置在多栅n和p-MOSFET的原子级沟道中，以及集成在同一芯片上的60-240 GHz自旋控制和自旋读出电路。作为一项根本性的突破，制造的量子比特将具有与60-240 GHz拉比频率相对应的0.25-1 meV量级的模式能级分裂，适合在312开尔文的温度下运行，比现在的量子比特高两个数量级。调谐的毫米波电路允许10-20ps的自旋控制脉冲，这有助于过滤宽带热噪声，并使所提出的量子比特和QC逻辑更能容忍短自旋相干和驰豫时间。对于给定的能级分裂，热噪声滤波可能会导致更高的温度操作。