Integrated Circuits for Large Arrays
大型阵列集成电路
基本信息
- 批准号:RGPIN-2020-06239
- 负责人:
- 金额:$ 2.4万
- 依托单位:
- 依托单位国家:加拿大
- 项目类别:Discovery Grants Program - Individual
- 财政年份:2022
- 资助国家:加拿大
- 起止时间:2022-01-01 至 2023-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Computing and data communications have changed the way we work, communicate, socialize, learn, and educate. To improve livelihoods and to solve most of the challenging problems humans face as a society, we need wireless connectivity, computing, and data-centers that can process massive amounts of data with sustainable power consumption. With the exponential scaling of complementary metal-oxide-semiconductor (CMOS) technology coming to an end due to physical and economic limitations in manufacturing, multi-core and inter-linked data processing and communication have risen to the fore. 5G cellular systems have currently adopted 10-100 of antenna arrays, called Massive MIMO (Multiple-Input Multiple-Output), to facilitate the data throughput demanded by communications and computing systems. Furthermore, the next-generation architecture is predicting the use of extremely-large antenna arrays, in hundreds to thousands, to meet the projected demand for high-speed connectivity. The design of these hardware systems has extremely large challenges, with 100-1000 of such antennas requiring synchronization and an ability to steer the signal with precise angles (beamforming). Our research will seek to design circuits and systems to solve two critical problems in such a network: (1) high-frequency clock generation, distribution, and synchronization between the antenna elements with low-power consumption; and (2) precise beamforming. A similar need to move a massive amount of data is also arising to facilitate large machine learning computing tasks, leading to the adoption of multiple accelerator chips, called chiplets, interconnected to each other. With many machine learning tasks relying on data-intensive deep neural networks, large arrays of chiplets are being envisioned to carry out such demanding tasks in the future. Beyond the data crunching carried out by the processing elements, a large amount of power will be consumed by interconnects handling the data movement in such large arrays, even acting as a show-stopper for many tasks. This research proposal will seek to design circuits and systems to solve the interconnect challenge between the large arrays of chiplets: (1) doubling the data throughput on the short-reach electrical wireline links without power overhead; and (2) reducing the power consumption of silicon photonics link so as to bring optics closer to the compute chiplets. The applicant's previous discovery grant laid the foundation for these objectives at the devices and circuits level. This proposal aims for significant power consumption reduction and throughput increase to realize large arrays. Canada is a hotbed for research in wireless communications and machine learning. Ensuring that we also remain ahead in the hardware research and development to support the next generation of cellular systems and machine learning acceleration will pave the way for highly valued jobs, technologies, and startups.
计算和数据通信改变了我们的工作、通信、社交、学习和教育方式。为了改善生计并解决人类社会面临的大多数挑战性问题,我们需要无线连接、计算和数据中心,以可持续的功耗处理海量数据。由于制造的物理和经济限制,互补金属氧化物半导体(CMOS)技术的指数级规模即将结束,多核和互连的数据处理和通信已经脱颖而出。5G蜂窝系统目前已经采用了10-100个天线阵列,称为大规模MIMO(多输入多输出),以促进通信和计算系统所需的数据吞吐量。此外,下一代架构预计将使用成百上千个极大的天线阵列,以满足预计的高速连接需求。这些硬件系统的设计具有极大的挑战,100-1000个这样的天线需要同步和以精确的角度引导信号的能力(波束形成)。我们的研究将寻求设计电路和系统来解决这样一个网络中的两个关键问题:(1)高频时钟的产生、分配和低功耗天线单元之间的同步;(2)精确的波束形成。移动大量数据的类似需求也出现了,以促进大型机器学习计算任务,导致采用相互连接的多个加速器芯片,称为芯片。随着许多机器学习任务依赖于数据密集型深度神经网络,人们预计未来将有大量芯片来执行这种要求苛刻的任务。除了处理元素执行的数据处理之外,在如此大的阵列中处理数据移动的互连还将消耗大量电力,甚至在许多任务中充当停顿。这项研究方案将寻求设计电路和系统来解决大芯片阵列之间的互连挑战:(1)在没有电力开销的情况下,将短距离有线电缆链路上的数据吞吐量提高一倍;以及(2)降低硅光子链路的功耗,以便使光学设备更接近计算芯片。申请者之前的发现拨款为这些设备和电路层面的目标奠定了基础。该方案旨在显著降低功耗和提高吞吐量,以实现大型阵列。加拿大是无线通信和机器学习研究的温床。确保我们在硬件研发方面保持领先地位,以支持下一代蜂窝系统和机器学习加速,将为高价值的工作、技术和初创企业铺平道路。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
数据更新时间:{{ journalArticles.updateTime }}
{{
item.title }}
{{ item.translation_title }}
- DOI:
{{ item.doi }} - 发表时间:
{{ item.publish_year }} - 期刊:
- 影响因子:{{ item.factor }}
- 作者:
{{ item.authors }} - 通讯作者:
{{ item.author }}
数据更新时间:{{ journalArticles.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ monograph.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ sciAawards.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ conferencePapers.updateTime }}
{{ item.title }}
- 作者:
{{ item.author }}
数据更新时间:{{ patent.updateTime }}
Shekhar, Sudip其他文献
Crosstalk in SOI Microring Resonator-Based Filters
- DOI:
10.1109/jlt.2015.2480101 - 发表时间:
2016-06-15 - 期刊:
- 影响因子:4.7
- 作者:
Jayatilleka, Hasitha;Murray, Kyle;Shekhar, Sudip - 通讯作者:
Shekhar, Sudip
A Dual-Polarization Silicon-Photonic Coherent Transmitter Supporting 552 Gb/s/wavelength
- DOI:
10.1109/jssc.2020.2988399 - 发表时间:
2020-09-01 - 期刊:
- 影响因子:5.4
- 作者:
Ahmed, Abdelrahman H.;El Moznine, Abdellatif;Shekhar, Sudip - 通讯作者:
Shekhar, Sudip
Photoconductive heaters enable control of large-scale silicon photonic ring resonator circuits
- DOI:
10.1364/optica.6.000084 - 发表时间:
2019-01-20 - 期刊:
- 影响因子:10.4
- 作者:
Jayatilleka, Hasitha;Shoman, Hossam;Shekhar, Sudip - 通讯作者:
Shekhar, Sudip
A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers
- DOI:
10.1109/tcsi.2018.2873809 - 发表时间:
2019-03-01 - 期刊:
- 影响因子:5.1
- 作者:
El Sayed, Ahmed;Mishra, Amit K.;Shekhar, Sudip - 通讯作者:
Shekhar, Sudip
Automatic Configuration and Wavelength Locking of Coupled Silicon Ring Resonators
- DOI:
10.1109/jlt.2017.2769962 - 发表时间:
2018-01-15 - 期刊:
- 影响因子:4.7
- 作者:
Jayatilleka, Hasitha;Shoman, Hossam;Shekhar, Sudip - 通讯作者:
Shekhar, Sudip
Shekhar, Sudip的其他文献
{{
item.title }}
{{ item.translation_title }}
- DOI:
{{ item.doi }} - 发表时间:
{{ item.publish_year }} - 期刊:
- 影响因子:{{ item.factor }}
- 作者:
{{ item.authors }} - 通讯作者:
{{ item.author }}
{{ truncateString('Shekhar, Sudip', 18)}}的其他基金
Advanced-modulation circuits for low-power scalable wireline transceivers
适用于低功耗可扩展有线收发器的高级调制电路
- 批准号:
543951-2019 - 财政年份:2021
- 资助金额:
$ 2.4万 - 项目类别:
Collaborative Research and Development Grants
Electronic-photonic integrated circuits for on-chip optical isolation
用于片上光隔离的电子光子集成电路
- 批准号:
539204-2019 - 财政年份:2021
- 资助金额:
$ 2.4万 - 项目类别:
Collaborative Research and Development Grants
Infrastructure for silicon photonic test and development
硅光子测试和开发基础设施
- 批准号:
RTI-2022-00723 - 财政年份:2021
- 资助金额:
$ 2.4万 - 项目类别:
Research Tools and Instruments
Integrated Circuits for Large Arrays
大型阵列集成电路
- 批准号:
RGPIN-2020-06239 - 财政年份:2021
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Phase I: High-performance clock multiplier units
第一阶段:高性能时钟倍频器单元
- 批准号:
560696-2021 - 财政年份:2021
- 资助金额:
$ 2.4万 - 项目类别:
Idea to Innovation
Electronic-photonic integrated circuits for on-chip optical isolation
用于片上光隔离的电子光子集成电路
- 批准号:
539204-2019 - 财政年份:2020
- 资助金额:
$ 2.4万 - 项目类别:
Collaborative Research and Development Grants
Advanced-modulation circuits for low-power scalable wireline transceivers
适用于低功耗可扩展有线收发器的高级调制电路
- 批准号:
543951-2019 - 财政年份:2020
- 资助金额:
$ 2.4万 - 项目类别:
Collaborative Research and Development Grants
Integrated Circuits for Large Arrays
大型阵列集成电路
- 批准号:
RGPIN-2020-06239 - 财政年份:2020
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Electronic-photonic integrated circuits for on-chip optical isolation
用于片上光隔离的电子光子集成电路
- 批准号:
539204-2019 - 财政年份:2019
- 资助金额:
$ 2.4万 - 项目类别:
Collaborative Research and Development Grants
Circuits and Systems Enabling Silicon-Photonics Signaling
支持硅光子信号传输的电路和系统
- 批准号:
RGPIN-2015-04120 - 财政年份:2019
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
相似海外基金
SHF: Small: Explainable Machine Learning for Better Design of Very Large Scale Integrated Circuits
SHF:小:可解释的机器学习,用于更好地设计超大规模集成电路
- 批准号:
2322713 - 财政年份:2023
- 资助金额:
$ 2.4万 - 项目类别:
Standard Grant
Computer-Aided Design for High-Performance Large-Scale Integrated Circuits
高性能大规模集成电路的计算机辅助设计
- 批准号:
RGPIN-2020-04186 - 财政年份:2022
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Integrated Circuits for Large Arrays
大型阵列集成电路
- 批准号:
RGPIN-2020-06239 - 财政年份:2021
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Computer-Aided Design for High-Performance Large-Scale Integrated Circuits
高性能大规模集成电路的计算机辅助设计
- 批准号:
RGPIN-2020-04186 - 财政年份:2021
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Computer-Aided Design for High-Performance Large-Scale Integrated Circuits
高性能大规模集成电路的计算机辅助设计
- 批准号:
RGPIN-2020-04186 - 财政年份:2020
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Integrated Circuits for Large Arrays
大型阵列集成电路
- 批准号:
RGPIN-2020-06239 - 财政年份:2020
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Computer-Aided Design for High-Performance Large-Scale Integrated Circuits
高性能大规模集成电路的计算机辅助设计
- 批准号:
RGPIN-2015-03759 - 财政年份:2019
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual
Development of Non-Equilibrium Processing of High Carrier Mobility Semiconductors on Insulator for High Speed Large Scale Integrated Circuits
高速大规模集成电路绝缘体上高载流子迁移率半导体非平衡加工的研究进展
- 批准号:
19K21976 - 财政年份:2019
- 资助金额:
$ 2.4万 - 项目类别:
Grant-in-Aid for Challenging Research (Exploratory)
Routing Congestion in Very Large Scale Integrated Circuits
超大规模集成电路中的路由拥塞
- 批准号:
536882-2018 - 财政年份:2018
- 资助金额:
$ 2.4万 - 项目类别:
University Undergraduate Student Research Awards
Computer-Aided Design for High-Performance Large-Scale Integrated Circuits
高性能大规模集成电路的计算机辅助设计
- 批准号:
RGPIN-2015-03759 - 财政年份:2018
- 资助金额:
$ 2.4万 - 项目类别:
Discovery Grants Program - Individual