面向与IC工艺兼容的Si（100）衬底高亮度3D发光器件研究

与成熟的半导体集成电路（IC）制造工艺相兼容及结合是未来LED成本大幅下降的必然选择。国际上高性能硅基氮化物器件绝大多数采用Si（111）平面衬底及复杂的多步缓冲层工艺，以解决大失配体系外延层中的应力应变及开裂问题。本项目拟面向未来LED与微电子工业相结合大幅降低成本及光电子/微电子集成应用，采用Si（100）衬底，利用化学腐蚀形成Si（111）非平面周期倒金字塔图形衬底，突破现有平面Si（111）衬底技术及性能瓶颈，有效缓解应力，实现优质全组分氮化物材料可控生长；系统研究III 族氮化物材料在百微米量级倒金字塔硅衬底表面生长、极性、缺陷以及晶体质量之间的作用和调控规律，重点关注倒金字塔硅/氮化物表/界面物理特性及能带调控；实现高亮度广角出射垂直结构3D发光器件及低成本晶圆级封装，为氮化物LED器件工艺走向与成熟微电子工艺兼容及成本大幅降低提供技术支撑。

IC fabrication technology compatibility is a promising route for LED cost reduction in future. Silicon substrate has been demonstrated to be a promising candidate in light of its high thermal and electrical conductivity, large wafer size and cost-effectiveness. However, due to the large lattice and thermal mismatch, hetero-epitaxial of group III-nitride on silicon usually results in high high-density of defects, residual strain and cracks. This project is based on our previously developed works of periodic inverted pyramids (IP) silicon substrate with TMAH etching with size or more than 100 micro meters. On 20basis of our previously reported fabrication of large wafer size patterned IP silicon, we aim to focus on the IP silicon as the substrate for III-nitrides compound materials epitaxial and LEDs devices fabrication. By using the unflat IP silicon surface with (111) plane as the nucleation sites and epitaxial substrate, the residual strain introduced in epitaxial layer and substrate is expected to be alleviated effectively while the buffer layer is deposited, giving rise to a reduced defects density and cracks in the epitaxial layer. With the technique of IP silicon substrate and alleviation of lattice and thermal mismatch induced strain, we will fabricate low-defects and high quality group III-nitride buffer and epitaxial layer. We will systematically investigate the correlations between nucleation, micron-scale silicon size and distribution, growth mode, mechanism, morphology, defects and crystalline quality. Based on the high quality epitaxial-layer on this novel IP silicon substrate, we will try to design and fabricate the LED devices with large power output, high brightness, low cost and high reliability, and finally, we will realize white color LEDs devices with wafer scale packaging.