硅基高速光接收机集成芯片基础研究

针对片上光互连对光接收集成芯片高带宽、高密度、低功耗的要求，开展高速高响应低暗电流的硅基Ge光电探测器和低损耗紧凑型波分复用/解复用器研究，并实现解复用器与光电探测器集成，制备出面向片上光互连的高速光接收集成芯片和模块。课题将研究硅基Ge探测器光电高效耦合，在减小器件尺寸、提高速度的同时，保持高量子效率；研究硅基Ge光电探测器暗电流特性，揭示硅基Ge光电探测器的暗电流形成机理，掌握抑制暗电流的方法；研究模场在AWG及EDG复杂波导结构中的传输特性，分析不同结构波导间模场转换对AWG和EDG损耗和串扰的影响；设计制备具有光子晶体反射镜结构的EDG，阐明EDG中光子晶体反射镜降低损耗、减小串扰的物理机制；研究高速光电探测器和波分复用/解复用器单片集成的兼容性等关键技术，研制出具有1Tbit/s光信号接收能力的高速光接收集成芯片；实现光接收芯片与TIA电路的高速封装，研制出演示集成模块。

Integrated photonic receiver with high speed, high density and low power consumption is crucial for on-chip optical interconnect. Compact low-loss MUX/DEMUX and Ge photodetector with high speed, high efficiency and low dark current will be studied and monolithically integrated to realize integrated photonic receiver chip and module. Design and fabrication of Ge photodetector on Si will be performed to achieve small size, high speed and high quantum efficiency simultaneously. The mechanism of dark current of Ge photodetector will be focused and methods of reducing the dark current will be obtained. The transfer performance and the mode conversion between the different waveguides in AWG and EDG will also be studied. Design and fabrication of EDG with photonic crystal will be done and the the insert loss and cross talk will be studied. The project will also study the key integration technologies, such as compatibility, to demonstrate 1Terabit/s photonic receiver with 40-channel DEMUX and 40 high-speed Ge photodiodes. A demo module will also be formed by packaging the photonic receiver chip with TIA circuit.