Temporal Logic, Hardware Verification, and Automatic Theorem Proving
Temporal Logic, Hardware Verification, and Automatic Theorem Proving
批准号:
8722633
负责人:
Edmund Clarke
金额:
$15.84万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1988
资助国家:
美国
项目状态:
已结题
起止时间:
1988-03-01 至 1990-08-31
中文摘要
这项工作包括几个研究项目的逻辑程序和 程序验证 所有的项目都是针对 提供使自动核查可行的工具, 更广泛的课程。 前三个项目涉及一种验证有限状态的方法 并发系统称为时态逻辑模型检查。 这 过程将确定有限状态并发系统是否满足 它在命题时态逻辑中的规范, 搜索由所述并发系统生成的所述全局状态图。 它已被成功地用于发现出版物中的细微错误 复杂的自定时电路设计。 第一个项目是开发 处理可能发生的状态爆炸问题的方法 验证的类型。 另一个项目是扩展时态逻辑 和它的验证过程,允许由自动机定义的算子 无限的磁带。 这一点具有重要的实际意义,因为 时间逻辑的批评是它的表达能力相比, 自动机 第三个项目涉及实际使用模型检查 硬件控制器的自动验证技术。 的 在这种情况下,主要问题是开发提取状态的方法 机器从电路下现实的定时模型。 最后一个项目是并行归结定理的发展 在Sequent和Encore多处理器上运行。 已经是 顺利进行中。 由于兴趣主要是由 并发,可以使用一个相当简单的定理证明策略, 线性分辨率/模型消除。 条款被保留 根据堆数据结构中的某个启发式函数, 允许并行插入和删除。 一个原型实现 整个系统应可在未来数月内运作。 实验 与其他组织定理证明器的方法以及更多 复杂的定理证明策略将随之而来。
英文摘要
This work comprises several research projects in logics of programs and program verification. All of the projects are directed towards providing tools that will make automatic verification feasible for a wider class of programs. The first three projects involve an approach to verifying finite state concurrent systems called temporal logic model checking. This procedure will determine if a finite-state concurrent system satisfies its specification in a propositional temporal logic by methodically searching the global state graph generated by the concurrent system. It has been used successfully to find subtle errors in published designs of tricky self-timed circuits. The first project is to develop ways of handling the state explosion problem that may occur with this type of verification. Another project is to extend the temporal logic and its verification procedure to allow operators defined by automata on infinite tapes. This is of practical importance since a frequent criticism of temporal logic is its expressive power compared to automata. The third project involves actually using model checking techniques for the automatic verification of hardware controllers. The main problem in this case is to develop methods of extracting state machines from circuits under realistic timing models. The last project is the development of a parallel resolution theorem prover to run on Sequent and Encore multiprocessors. It is already well underway. Since interest primarily in problems caused by concurrency, one can use a fairly simple theorem proving strategy based on linear resolution/model elimination. Clauses are maintained according to some heuristic function in a heap data structure that permits parallel inserts and deletions. A prototype implementation of the full system should be running in the next few months. Experiments with other ways of organizing the theorem prover and with more complicated theorem proving strategies will follow.
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Collaborative Research: Next-Generation Model Checking and Abstract Interpretation with a Focus on Embedded Control and Systems Biology
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批准号:0926181
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项目类别:Standard Grant
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资助金额:$384.57万
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财政年份:2009
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负责人:Edmund Clarke
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依托单位:
The Component Substitution Problem for Software Systems
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批准号:0541245
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项目类别:Standard Grant
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资助金额:$34.83万
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财政年份:2006
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负责人:Edmund Clarke
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依托单位:
EHS: Graph-Based Refinement Strategies for Hybrid Systems
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批准号:0411152
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项目类别:Continuing Grant
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资助金额:$55.0万
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财政年份:2004
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负责人:Edmund Clarke
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依托单位:
Efficient Model Checking of Concurrent and Dynamic Software
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批准号:0429120
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项目类别:Continuing Grant
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资助金额:$0.0万
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财政年份:2004
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负责人:Edmund Clarke
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依托单位:
The CUE Initiative on The Scientific Foundation of Software Engineering
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批准号:0327252
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项目类别:Standard Grant
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资助金额:$0.7万
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财政年份:2003
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负责人:Edmund Clarke
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依托单位:
Automatic Verification of Concurrent Hardware and Software Systems
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批准号:0098072
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项目类别:Continuing Grant
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资助金额:$37.5万
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财政年份:2001
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负责人:Edmund Clarke
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依托单位:
ITR/SY: Verification Tools for Autonomous and Embedded Systems
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批准号:0121547
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项目类别:Continuing Grant
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资助金额:$100.0万
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财政年份:2001
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负责人:Edmund Clarke
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依托单位:
NSF-CNPq Collaborative Research: Formal Verification of Computer Systems in Industrial Complexity
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批准号:9900309
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项目类别:Standard Grant
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资助金额:$15.54万
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财政年份:1999
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负责人:Edmund Clarke
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依托单位:
Automatic Verification of Finite-State Concurrent Systems in Hardware and Software
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批准号:9803774
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项目类别:Continuing Grant
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资助金额:$47.5万
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财政年份:1998
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负责人:Edmund Clarke
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依托单位:
Automatic Verification of Finite-State Concurrent Systems in Hardware and Software
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批准号:9217549
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项目类别:Continuing Grant
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资助金额:$74.49万
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财政年份:1993
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负责人:Edmund Clarke
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依托单位:
U.S.-Japan Cooperative Research: Formal Verification of Finite State Systems
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批准号:9016694
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项目类别:Standard Grant
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资助金额:$1.98万
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财政年份:1991
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负责人:Edmund Clarke
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依托单位:
Temporal Logic, Hardware Verification, and Parallel Theorem Proving
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批准号:9005992
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项目类别:Continuing Grant
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资助金额:$21.2万
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财政年份:1990
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负责人:Edmund Clarke
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依托单位:
Programming Language Issues in VLSI Design
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批准号:8509909
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项目类别:Continuing Grant
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资助金额:$17.75万
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财政年份:1986
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负责人:Edmund Clarke
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依托单位:
Workshop on Logics of Programs, Pittsburgh, Pennsylvania, June 5-8, 1983
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批准号:8303082
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项目类别:Standard Grant
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资助金额:$1.0万
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财政年份:1983
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负责人:Edmund Clarke
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依托单位:
Design and Verification of Concurrent Systems (Computer Research)
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批准号:8216706
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项目类别:Standard Grant
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资助金额:$22.14万
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财政年份:1982
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负责人:Edmund Clarke
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依托单位:
Design and Verification of Concurrent Systems
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批准号:8105553
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项目类别:Standard Grant
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资助金额:$12.73万
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财政年份:1981
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负责人:Edmund Clarke
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依托单位:
Verification of Recursive Programs, Concurrent Programs, AndAbstract Data Types
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批准号:7908365
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项目类别:Standard Grant
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资助金额:$5.72万
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财政年份:1979
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负责人:Edmund Clarke
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依托单位:
国内基金
海外基金
greenwashing behavior in China:Basedon an integrated view of reconfiguration of environmental authority and decoupling logic
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项目类别:外国学者研究基金项目
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批准年份:2024
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负责人:YU BYUNGJUN
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依托单位:
Incentive and governance schenism study of corporate green washing behavior in China: Based on an integiated view of econfiguration of environmental authority and decoupling logic
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项目类别:外国学者研究基金项目
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批准年份:2024
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负责人:YU BYUNGJUN
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