课题基金 / 基金详情

NEW LOGIC LSI'S HAVING SOFT HARDWARE CONFIGURATION

NEW LOGIC LSI'S HAVING SOFT HARDWARE CONFIGURATION
具有软硬件配置的新逻辑LSI
批准号:
04402029
负责人:
SHIBATA Tadashi
金额:
$9.79万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for General Scientific Research (A)
财政年份:
1992
资助国家:
日本
项目状态:
已结题
起止时间:
1992 至 1993

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中文摘要
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英文摘要
Integrated circuits are usually called hardware because their functions cannot be altered once they were built on silicon. The purpose of this research is to develop a new Soft Hardware which can arbitrarily change its function by external control signals. Based on such new circuit concept, we have established the foundations for new architecture computers that can perform very flexible information processing.A high-functionality transistor called Neuron MOSFET(vMOS) which we invented and developed has allowed us to explore such new-concept circuits. Several test circuits were fabricated using double-polysilicon CMOS process and the concepts have been experimentally verified. It has been demonstrated that two-input and three-input soft-hardware logic circuits can change their logic functions such as OR, AND, EXOR, EXNOR, INHIBIT, MAJORITY VOTER etc. in real time according to the external control signals. A real-time data matching circuit having real-time variable window has been also d … More eveloped using only 10 transistors. Such circuit blocks serve as key elements to build intellignet data processing systems.In addition, a hardware search engine has been developed also using vMOS circuitry. The hardware can find out the most similar data in a memory cell array without any software manipulation. In conventional circuits, the search for the most similar requires very time-consuming sequential data-to-data comparisons. In vMOS circuitry, however, search is performed in a fully parallel manner on hardware, thus achieving minimum latency. An intelligent memory technology has been developed also based on vMOS soft-hardware circuitry. We have developed a static memory that quantizes the incoming data into multivalued format, memorizes the data, and classifies them into various formats all at each memory cell level. A dynamic memory that memorizes an analog or multivalued data and performs an association with succeeding input data has been developed. When these memories are merged into the search engine, a new architecture for intelligent information processing systems is going to be established. Less
期刊论文(48)
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会议论文
T.Shibata: "Hardware implementation of intelligence on silicon using four-terminal devices" Proc.Int.Conf.Advanced Microelectronic Devices and Processing,Sendai,March 3-5,1994,pp.743-750. 743-750 (1994)
T.Shibata:“使用四端设备在硅上实现智能的硬件”Proc.Int.Conf.Advanced MicroElectronic Devices and Processing,仙台,1994 年 3 月 3-5 日,第 743-750 页。
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T.Shibata: "Real-time reconfigurable logic circuits using neuron MOS transistors" ISSCC Dig.Technical papers,Feb.1993,FA 15.3. 238-239 (1993)
T.Shibata:“使用神经元 MOS 晶体管的实时可重构逻辑电路”ISSCC Dig.技术论文,1993 年 2 月,FA 15.3。
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T.Shibata: "Neuron MOS binary-logic integrated circuits:Part I,Design fundamentals and soft-hardware-logic circuit implementation" IEEE Trans.Electron Devices. 40. 570-576 (1993)
T.Shibata:“神经元 MOS 二进制逻辑集成电路:第一部分,设计基础知识和软硬件逻辑电路实现”IEEE Trans.Electron Devices。
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通讯作者:
T.Shibata and T.Ohmi: "Neuron MOS binary-logic integrated circuits Part I, Design fundamentals and soft-hardware-logic circuit implementation" IEEE Trans.Electron Devices. Vol.40, No.3. 570-576 (1993)
T.Shibata 和 T.Ohmi:“Neuron MOS 二进制逻辑集成电路第一部分,设计基础和软硬件逻辑电路实现”IEEE Trans.Electron Devices。
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