NEW LOGIC LSI'S HAVING SOFT HARDWARE CONFIGURATION

具有软硬件配置的新逻辑LSI

• 批准号: 04402029
• 负责人: SHIBATA Tadashi
• 金额: $ 9.79万
• 依托单位: TOHOKU UNIVERSITY
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for General Scientific Research (A)
• 财政年份: 1992
• 资助国家: 日本
• 起止时间: 1992 至 1993
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-04402029/
• 关键词: Functional Device; Neuron MOS Transistor; Soft Hardware; Multi-Valued Logic; Data Matching; Multi-Valued Memory; Search Engine; CMOS; 論理LSI; ソフトハードウェアロジック; 加算器; コンピュータアーキテクチャ; MOSLSI

Integrated circuits are usually called hardware because their functions cannot be altered once they were built on silicon. The purpose of this research is to develop a new Soft Hardware which can arbitrarily change its function by external control signals. Based on such new circuit concept, we have established the foundations for new architecture computers that can perform very flexible information processing.A high-functionality transistor called Neuron MOSFET(vMOS) which we invented and developed has allowed us to explore such new-concept circuits. Several test circuits were fabricated using double-polysilicon CMOS process and the concepts have been experimentally verified. It has been demonstrated that two-input and three-input soft-hardware logic circuits can change their logic functions such as OR, AND, EXOR, EXNOR, INHIBIT, MAJORITY VOTER etc. in real time according to the external control signals. A real-time data matching circuit having real-time variable window has been also d … More eveloped using only 10 transistors. Such circuit blocks serve as key elements to build intellignet data processing systems.In addition, a hardware search engine has been developed also using vMOS circuitry. The hardware can find out the most similar data in a memory cell array without any software manipulation. In conventional circuits, the search for the most similar requires very time-consuming sequential data-to-data comparisons. In vMOS circuitry, however, search is performed in a fully parallel manner on hardware, thus achieving minimum latency. An intelligent memory technology has been developed also based on vMOS soft-hardware circuitry. We have developed a static memory that quantizes the incoming data into multivalued format, memorizes the data, and classifies them into various formats all at each memory cell level. A dynamic memory that memorizes an analog or multivalued data and performs an association with succeeding input data has been developed. When these memories are merged into the search engine, a new architecture for intelligent information processing systems is going to be established. Less

集成电路通常被称为硬件，因为一旦它们被构建在硅上，它们的功能就不能被改变。本课题的研究目的是开发一种可以通过外部控制信号任意改变其功能的新型软硬件。基于这种新的电路概念，我们为能够进行非常灵活的信息处理的新架构计算机奠定了基础。我们发明和开发的一种称为神经元MOSFET（vMOS）的高功能晶体管使我们能够探索这种新概念电路。利用双多晶硅CMOS工艺制作了多个测试电路，并对其概念进行了实验验证。研究表明，双输入和三输入软、硬件逻辑电路可以根据外部控制信号实时改变或、与、出或、出或、抑制、多数选民等逻辑功能。本文还研制了一种具有实时可变窗口的实时数据匹配电路。这些电路模块是构建智能数据处理系统的关键元素。此外，还利用vMOS电路开发了一个硬件搜索引擎。硬件可以在不需要任何软件操作的情况下找出存储单元阵列中最相似的数据。在传统电路中，寻找最相似的电路需要非常耗时的顺序数据对数据的比较。然而，在vMOS电路中，搜索在硬件上以完全并行的方式执行，从而实现最小的延迟。基于vMOS软、硬件电路的智能存储技术也得到了发展。我们已经开发了一种静态存储器，它将传入的数据量化为多值格式，存储数据，并在每个存储单元级别将它们分类为各种格式。一种动态存储器，用于存储模拟数据或多值数据并执行与后续输入数据的关联。当这些记忆被合并到搜索引擎中时，一种新的智能信息处理系统架构就建立起来了。少

项目成果

T.Shibata: "Hardware implementation of intelligence on silicon using four-terminal devices" Proc.Int.Conf.Advanced Microelectronic Devices and Processing,Sendai,March 3-5,1994,pp.743-750. 743-750 (1994)

T.Shibata：“使用四端设备在硅上实现智能的硬件”Proc.Int.Conf.Advanced MicroElectronic Devices and Processing，仙台，1994 年 3 月 3-5 日，第 743-750 页。

T.Shibata: "Real-time reconfigurable logic circuits using neuron MOS transistors" ISSCC Dig.Technical papers,Feb.1993,FA 15.3. 238-239 (1993)

T.Shibata：“使用神经元 MOS 晶体管的实时可重构逻辑电路”ISSCC Dig.技术论文，1993 年 2 月，FA 15.3。

T.Shibata: "Neuron MOS binary-logic integrated circuits:Part I,Design fundamentals and soft-hardware-logic circuit implementation" IEEE Trans.Electron Devices. 40. 570-576 (1993)

T.Shibata：“神经元 MOS 二进制逻辑集成电路：第一部分，设计基础知识和软硬件逻辑电路实现”IEEE Trans.Electron Devices。

T.Shibata and T.Ohmi: "Neuron MOS binary-logic integrated circuits Part I, Design fundamentals and soft-hardware-logic circuit implementation" IEEE Trans.Electron Devices. Vol.40, No.3. 570-576 (1993)

T.Shibata 和 T.Ohmi：“Neuron MOS 二进制逻辑集成电路第一部分，设计基础和软硬件逻辑电路实现”IEEE Trans.Electron Devices。

T.Shibata and T.Ohmi: "Four-terminal device-Impact of a new functional transistor on logic imtegrated circuits implementation" Proc.International Workshop on Process and Devices of Scaled LSI's, June, 1993, Seoul. 1-6

T.Shibata 和 T.Ohmi：“四端器件 - 新功能晶体管对逻辑集成电路实现的影响”Proc.International Workshop on Process and Devices of Scaled LSIs，1993 年 6 月，首尔。