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SaTC: CORE: Small: Efficient Logic Encryptions for Hardware IP Protection

SaTC: CORE: Small: Efficient Logic Encryptions for Hardware IP Protection
SaTC:CORE:小型:用于硬件 IP 保护的高效逻辑加密
批准号:
2113704
负责人:
Hai Zhou
金额:
$50.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2021
资助国家:
美国
项目状态:
未结题
起止时间:
2021-07-01 至 2025-06-30

项目摘要

项目成果

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中文摘要
翻译
随着集成电路制造外包的日益增多,硬件知识产权保护已经成为半导体行业的一个关键问题。该项目开发了有效的逻辑加密技术和工具,以保护电路免受盗版。逻辑加密是一种通过增加额外输入来修改电路的技术,以便只有拥有正确密钥的用户才能获得正确的结果。攻击者可以访问正常工作的芯片和电路结构,这一事实使该问题非常具有挑战性。该项目将开发高效的逻辑加密算法和程序,使用数学和密码学基础证明这些算法和程序是安全的。为了保护电路,逻辑加密需要在密钥不正确时插入错误,还需要防止攻击者从电路结构收集信息。前者被称为锁定,后者被称为混淆。该项目将这两项任务分开,并为这两项任务开发解决方案。它还调查了错误数量和密钥发现难度之间的竞争。对锁定、混淆和密钥长度之间的权衡进行了彻底的调查。对于混淆,将开发基于通用电路的解决方案,并且需要发现具有较小密钥长度的高效设计。为了将这些技术应用到集成电路设计流程中,需要开发和测试设计自动化算法和工具。知识产权保护已成为半导体行业生存的关键因素。该项目开发的技术和工具可以帮助行业减少甚至防止硬件盗版。工业测试案例将用于该项目的评估。该项目还将为下一代硬件设计人员提供培训和教育机会,帮助他们了解和提高他们设计的安全性。逻辑加密算法、程序和测试数据及其分析将作为项目的数据集收集。该数据集、解释说明和自述文件以及项目产生的出版物将保存在西北大学网站和GitHub的永久储存库中。网址是:https://github.com/haizhouus/Logic-EncryptionThis奖反映了美国国家科学基金会的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
With the increasing outsourcing of integrated circuit fabrication, hardware Intellectual Property protection has become a critical issue for the semiconductor industry. This project develops efficient logic encryption techniques and tools to protect circuits from piracy. Logic encryption is a technique that modifies a circuit with added extra inputs such that only users with the correct key can get the correct results. The fact that an attacker has the access to a working chip and the structure of the circuit makes the problem very challenging. The project will develop efficient algorithms and programs for logic encryption that are provably secure using mathematical and cryptographic foundations.To protect a circuit, logic encryption needs to insert errors when the key is incorrect, and also needs to prevent the attacker from gathering information from the circuit structure. The former is called locking, and the latter is called obfuscation. The project separates these two tasks and develops solutions for both of them. It also investigates the contention between the number of errors and hardness of key discovery. Trade-offs among the locking, obfuscation, and key lengths are thoroughly investigated. For obfuscation, universal circuit based solutions will be developed, and efficient designs with small key lengths need to be discovered. In order to apply the techniques in the integrated circuit design flow, design automation algorithms and tools need to be developed and tested.Intellectual property protection has become a key enabler for the survival of the semiconductor industry. The techniques and tools developed in the project can help the industry to reduce and even prevent hardware piracy. Industrial test cases will be used in the evaluation of the project. The project will also provide training and educational opportunities for next-generation hardware designers, to help them understand and improve the security of their designs.The logic encryption algorithms, programs, and testing data, and their analyses will be collected as the data set for the project. This data set, with explanation notes and README, and the publications generated from the project will be maintained in a permanent repositories at Northwestern website and on the GitHub. The URL is: https://github.com/haizhouus/Logic-EncryptionThis award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(5)
专著(0)
科研奖励(0)
会议论文
SE3: Sequential Equivalence Checking for Non-Cycle-Accurate Design Transformations †
SE3:非周期精确设计转换的顺序等价检查 †
DOI: 10.1109/dac56929.2023.10247912
发表时间: 2023
期刊: 2023 60th ACM/IEEE Design Automation Conference (DAC)
影响因子: --
作者: [You Li, Guannan Zhao, Yunqi He, H. Zhou]
通讯作者: H. Zhou
Discovering emergency call pitfalls for cellular networks with formal methods
使用形式化方法发现蜂窝网络的紧急呼叫陷阱
DOI: 10.1145/3458864.3466625
发表时间: 2021
期刊: MobiSys 2021
影响因子: --
作者: [Hou, Kaiyu, Li, You, Yu, Yinbo, Chen, Yan, Zhou, Hai]
通讯作者: Zhou, Hai
Sequential Logic Encryption Against Model Checking Attack
针对模型检查攻击的顺序逻辑加密
DOI: 10.23919/date51398.2021.9474002
发表时间: 2021
期刊: Testing in Europe
影响因子: --
作者: [Rezaei, Amin, Zhou, Hai]
通讯作者: Zhou, Hai
ObfusLock: An Efficient Obfuscated Locking Framework for Circuit IP Protection†
ObfusLock:用于电路 IP 保护的高效混淆锁定框架†
DOI: --
发表时间: 2023
期刊: Design, Automation and Test in Europe
影响因子: --
作者: [You Li, Guannan Zhao, Yunqi He, H. Zhou]
通讯作者: H. Zhou
EAGER: PUF-Locked Circuit Obfuscation for Counterfeit and Piracy Prevention
  • 批准号:
    1651695
  • 项目类别:
    Standard Grant
  • 资助金额:
    $10.0万
  • 财政年份:
    2016
  • 负责人:
    Hai Zhou
  • 依托单位:
SaTC: STARSS: ICM: Invariant Carrying Machine for Hardware Assurance
  • 批准号:
    1441695
  • 项目类别:
    Standard Grant
  • 资助金额:
    $33.33万
  • 财政年份:
    2014
  • 负责人:
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SHF: Small: Collaborative Research: A Systematic Approach to Multicore Parallel CAD
  • 批准号:
    1115550
  • 项目类别:
    Standard Grant
  • 资助金额:
    $24.0万
  • 财政年份:
    2011
  • 负责人:
    Hai Zhou
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CPA-DA: Efficient Sequential Synthesis and Optimization for High-Performance Circuits
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    0811270
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $30.0万
  • 财政年份:
    2008
  • 负责人:
    Hai Zhou
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