Architecture Synthesis and Retargetability for High- Performance Application-Specific Processors

提出了一种新的指令级并行（ILP）体系结构，称为XIMD。与传统的标量单处理器（包括流水线RISC）相比，该体系结构模型可以为更广泛的应用提供更好的性能和效率。XIMD体系结构采用多个功能单元，可以支持并发执行可变数量的指令流。其硬件实现的规律性和简单性使其具有高度可伸缩性和可重定向性，以适应不同的应用程序代码特征。目前，正在开发和评估XIMD体系结构模型。正在实现一个用于基线XIMD体系结构的功能级别模拟器。利用该仿真器可以定量分析XIMD的性能和效率。一个实用的原型机也正在设计中。目前正在评估使用现有部件的实施可行性和可实现的性能。支持XIMD架构模型的编译方法和技术也正在研究中。

A new instruction-level parallel (ILP) architecture called XIMD is proposed. This architecture model can provide better performance and efficiency for a broader range of applications than traditional scalar uniprocessors including pipelined RISC. The XIMD architecture employs multiple functional units and can support the concurrent execution of a variable number of instruction streams. The regularity and simplicity of its hardware implementation makes it highly scalable and retargetable to accommodate diverse application code characteristics. Currently, the XIMD architecture model is being developed and evaluated. A functional level simulator for a baseline XIMD architecture is being implemented. Using this simulator the performance and efficiency of the XIMD can be quantitatively analyzed. A practical prototype XIMD machine is also being designed. Implementation feasibility and achievable performance using currently available parts are being assessed. Compilation methodology and techniques to support the XIMD architecture model are also being investigated.