RIA: A Multi-Level Logic Optimization Program Which Generates Optimal Mix of AND, OR and EXOR Gates

现在有可能合成包含异或（EXOR）门的电路，而没有先前与之相关的尺寸和速度惩罚。采用EXOR技术设计的电路可以有效地实现，并且具有固有的可测试性。目前正在进行三个研究课题。首先是开发EXOR技术设计的综合理论。这一理论构成了EXOR设计算法发展的基础。其次是开发一种工具，该工具可以产生最佳的多级设计，该设计是给定功能的EXOR， OR和and门的混合物。使用层次分解来识别不同的子函数。分解、分解和再合成的算法正在开发中。第三是探索使用可编程门阵列和可编程逻辑器件进行优化设计的算法。

There is now potential to synthesize circuits which contain Exclusive OR (EXOR) gates without the size and speed penalties formerly associated with them. Circuits designed with EXOR technology can be efficiently implemented and are inherently testable. Three research topics are being pursued. The first is to develop a comprehensive theory for design in the EXOR technology. This theory forms the basis for development of algorithms for EXOR design. Second is to develop a tool which produces an optimal, multilevel design that is a mixture of EXOR, OR and AND gates for a given function. Hierarchal decomposition is being used to recognize different subfunctions. Algorithms are being developed for decomposition, factorization, and resynthesis. Third is to explore algorithms for optimal design using programmable gate arrays and programmable logic devices.