KArlsruhe's Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array (Kahrisma) Architecture

由于下一代应用程序的不同处理行为和不可预测的运行时间特性，未来的嵌入式设备在应用传统设计风格时可能不再有效地执行，例如，当在设计时为特定场景或应用领域定制设计时。我们坚信，关键的设计决策不能再在设计时固定/确定。这就产生了对创新处理器架构的需求，该架构能够灵活地对运行时场景做出反应。因此，我们提出了一种新的多粒度自适应硬件架构，紧密集成粗粒度和细粒度的可重构结构扩展的能力，以处理不同的指令集架构（ISA）并行。需要一个灵活的软件框架来利用这些新功能。不同的ISA需要一个可重定向的编译框架（基于架构描述语言），而自动多粒度自定义指令检测将为我们的多粒度可重配置硬件加速器提供优化的实现。此外，需要一个自适应的运行时系统，以有效地分配不同的应用程序和线程之间的可用硬件资源，考虑性能和功率约束。我们相信，我们的新概念将为未来的自适应嵌入式处理，针对下一代应用程序提供一个有前途的范例。

Due to the diverse processing behavior and non-predictable run-time characteristics of the next generation applications future embedded devices may no longer perform efficiently when applying traditional design styles, e.g. when a design is tailor made at design time for a specific scenario or application domain. We strongly believe that crucial design decisions can no longer be fixed/determined at design time. This begets the demand for an innovative processor architecture reacting flexibly to runtime scenarios. Therefore, we propose a novel multi-grained adaptable hardware architecture, tightly integrating coarse and fine-grained reconfigurable fabrics extended by the capability to handle different Instruction Set Architectures (ISAs) in parallel. A flexible software framework is needed to make use of these novel features. Different ISAs require a retargetable compilation framework (based on an Architecture Description Language) while automatic multi-grained Custom Instruction detection will deliver optimized implementations for our multi-grained reconfigurable hardware accelerators. Additionally, an adaptive run-time system is required to efficiently distribute the available hardware resources between different applications and threads considering performance and power constraints. We believe that our novel concept will provide a promising paradigm for future adaptive embedded processing, targeting next generation applications.