ITR: Exposing the compiler to the hardware: Memory Subsystem Optimizations through Compiler/Micro-architecture Cooperation using Set Membership Information and Color Sets

将编译器暴露给硬件：利用集合隶属信息和ColorAbstract（order）实现编译器/微体系结构协同的内存子系统优化本研究提出将编译器获得的静态知识用于微体系结构的动态决策。在这方面，编译器完全使用集合成员信息向微体系结构公开编译时分析，微体系结构使用该信息做出关键的调度和内存优化决策。这种方法允许检查使用纯硬件或完全编译器管理的解决方案无法完成的内存墙问题的解决方案。本研究将以集合隶属度为框架，探讨以下问题：1。1 .在运行时高效地消除加载/存储操作的内存歧义，以增加并行内存操作的数量；2 .可扩展的缓存和加载/存储队列设计，可以为大规模超标量处理器维持每个周期的多次内存访问；利用编译器生成的工作集信息形成新的缓存设计，以减少冲突和容量缺失的数量；和4。基于工作集的预取技术，减少误取次数和误取惩罚。所提出的研究将显著提高科学应用的性能。这些应用是基础科学研究的核心，它们的表现对许多科学领域的进步至关重要。本研究亦将加强编译器与微架构之间的协同作用，推动资讯科技的发展。

Exposing the compiler to the hardware: Memory Subsystem Optimizations through Compiler/Micro-architecture Cooperation using Set Membership Information and ColorAbstract(Onder)This research proposes to make use of the static knowledge obtained by the compiler in the dynamic decision making of the micro-architecture. In that respect, the compiler exposes compile-time analysis to the micro-architecture fully using set membership information, and the micro-architecture uses this information to make critical scheduling and memory optimization decisions. This approach allows the examination of solutions to the memory wall problem that are impossible to do using a hardware-only or fully compiler-managed solution. Using set membership as a framework, this research will pursue the following problems:1. Cost-effective run-time memory disambiguation of load/store operations to increase the number of parallel memory operations;2. Scalable cache and load/store queue designs that can sustain multiple memory accesses every cycle for wide-issue superscalar processors;3. Novel cache designs formed in cooperation with compiler-generated working-set information to reduce the number of conflict and capacity misses; and,4. Working-set based prefetching techniques to reduce the number of misses and the miss penalty.The proposed research will significantly improve the performance of scientific applications. These applications are at the heart of basic science research, and their performance is crucial for the advancement of many fields of science. This research will also strengthen the synergy between compilers and micro-architectures, and advance the state-of-the-art in information technology.