SHF: Medium: Collaborative Research: Statically Controlled Asynchronous Lane Execution (SCALE)

SHF:中:协作研究:静态控制异步通道执行 (SCALE)

基本信息

  • 批准号:
    1901005
  • 负责人:
  • 金额:
    $ 59.95万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Continuing Grant
  • 财政年份:
    2019
  • 资助国家:
    美国
  • 起止时间:
    2019-09-15 至 2024-08-31
  • 项目状态:
    已结题

项目摘要

Enabling better performing systems benefits applications that span those running on mobile devices to large data applications running on data centers. The efficiency of most applications is still primarily affected by single thread performance. Instruction-level parallelism (ILP) speeds up programs by executing instructions of the program in parallel, with 'superscalar' processors achieving maximum performance. At the same time, energy efficiency is a key criteria to keep in mind as such speedup happens, with these two being conflicting criteria in system design. This project develops a Statically Controlled Asynchronous Lane Execution (SCALE) approach that has the potential to meet or exceed the performance of a traditional superscalar processor while approaching the energy efficiency of a very long instruction word (VLIW) processor. As implied by its name, the SCALE approach has the ability to scale to different types and levels of parallelism. The toolset and designs developed in this project will be available as open-source and will also have an impact on both education and research. The SCALE architectural and compiler techniques will be included in undergraduate and graduate curricula.The SCALE approach supports separate asynchronous execution lanes where dependencies between instructions in different lanes are statically identified by the compiler to provide inter-lane synchronization. Providing distinct lanes of instructions allows the compiler to generate code for different modes of execution to adapt to the type of parallelism that is available at each point within an application. These execution modes include explicit packaging of parallel instructions, parallel and pipelined execution of loop iterations, single program multiple data (SPMD) execution, and independent multi-threading.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
支持性能更好的系统有利于应用程序,从运行在移动的设备上的应用程序到运行在数据中心上的大型数据应用程序。大多数应用程序的效率仍然主要受单线程性能的影响。指令级并行(ILP)通过并行执行程序的指令来加速程序,“超标量”处理器实现最大性能。与此同时,能源效率是一个关键的标准,要记住这样的加速发生,这两个是冲突的标准在系统设计。该项目开发了一种静态控制异步通道执行(SCALE)方法,该方法有可能达到或超过传统超标量处理器的性能,同时接近超长指令字(VLIW)处理器的能效。 顾名思义,SCALE方法能够扩展到不同类型和级别的并行性。该项目开发的工具集和设计将以开源形式提供,并将对教育和研究产生影响。SCALE架构和编译器技术将被纳入本科生和研究生课程。SCALE方法支持独立的异步执行通道,其中不同通道中的指令之间的依赖关系由编译器静态识别,以提供通道间同步。提供不同的指令通道允许编译器为不同的执行模式生成代码,以适应应用程序内每个点处可用的并行类型。这些执行模式包括并行指令的显式打包、循环迭代的并行和流水线执行、单程序多数据(SPMD)执行和独立多线程。该奖项反映了NSF的法定使命,并通过使用基金会的智力价值和更广泛的影响审查标准进行评估,被认为值得支持。

项目成果

期刊论文数量(2)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache
降低丢失率并消除数据过滤器缓存的性能损失
Facilitating the Bootstrapping of a New ISA
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Soner Onder其他文献

Future value based single assignment program representations and optimizations
基于未来价值的单一分配程序表示和优化
  • DOI:
  • 发表时间:
    2012
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Soner Onder;Shuhan Ding
  • 通讯作者:
    Shuhan Ding
Superscalar execution with dynamic data forwarding
具有动态数据转发的超标量执行

Soner Onder的其他文献

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{{ truncateString('Soner Onder', 18)}}的其他基金

Collaborative Research: SHF: Medium: Vectorized Instruction Space (VIS)
合作研究:SHF:媒介:矢量化指令空间 (VIS)
  • 批准号:
    2211353
  • 财政年份:
    2022
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Continuing Grant
IRES: Track I: Collaborative Research: Supporting FSU and MTU Student Research with NTNU Faculty on Automatic Improvement of Application Performance
IRES:第一轨道:合作研究:支持 FSU 和 MTU 学生与 NTNU 教师一起进行自动改进应用程序性能的研究
  • 批准号:
    2103105
  • 财政年份:
    2021
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Standard Grant
FoMR: Collaborative Research: Dependent ILP: Dynamic Hoisting and Eager Scheduling of Dependent Instructions
FoMR:协作研究:相关 ILP:相关指令的动态提升和紧急调度
  • 批准号:
    1823398
  • 财政年份:
    2018
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Standard Grant
XPS: Full: FP: Collaborative Research: Sphinx: Combining Data and Instruction Level Parallelism through Demand Driven Execution of Imperative Programs
XPS:完整:FP:协作研究:Sphinx:通过命令式程序的需求驱动执行将数据和指令级并行性相结合
  • 批准号:
    1533828
  • 财政年份:
    2015
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Standard Grant
EAGER: Combining Data and Instruction Level Parallelism through Demand Driven Execution of Imperative Programs
EAGER:通过命令式程序的需求驱动执行将数据和指令级并行性相结合
  • 批准号:
    1450062
  • 财政年份:
    2014
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Standard Grant
SHF: Small: Single Assignment Architecture / Single Assignment Compiler
SHF:小型:单赋值架构/单赋值编译器
  • 批准号:
    1116551
  • 财政年份:
    2011
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Standard Grant
CAREER: Future Values: Reshaping the Future of Instruction Level Parallelism
职业:未来价值:重塑指令级并行的未来
  • 批准号:
    0347592
  • 财政年份:
    2004
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Continuing Grant
ITR: Exposing the compiler to the hardware: Memory Subsystem Optimizations through Compiler/Micro-architecture Cooperation using Set Membership Information and Color Sets
ITR:将编译器暴露给硬件:使用集成员信息和颜色集通过编译器/微架构合作进行内存子系统优化
  • 批准号:
    0312892
  • 财政年份:
    2003
  • 资助金额:
    $ 59.95万
  • 项目类别:
    Standard Grant

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