SHF: Small: Single Assignment Architecture / Single Assignment Compiler

SHF：小型：单赋值架构/单赋值编译器

• 批准号: 1116551
• 负责人: Soner Onder
• 金额: $ 15.3万
• 依托单位: Michigan Technological University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-08-01 至 2013-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1116551&HistoricalAwards=false
• 关键词: SHF; Small; Single; Assignment; Architecture

Today, practically all processors employ instruction set architectures which are functionallyequivalent to each other. Compiler/micro-architecture cooperation using these traditionalrepresentations has already reached the point of diminishing returns. This project thereforeinvestigates the domain of single assignment program representations and direct support of thisdomain through micro-architecture implementation as a key concept that can break the barriersbetween the compilers and architectures. If successful, this new approach can have a significantimpact on the design of future processors, design of compiler internal representations as well asthe back-end of the compilers. It can also affect how parallelism is exploited at variousgranularities and how various optimizations are carried out. The investigated framework can helprevitalize computer architecture and compiler optimization research by opening up unexplored pathsfor research in high-performance systems. Consequently, it can affect every field of science andcommerce which rely on high-performance computation. Compiler/hardware integration around the concept of single-assignment form has many benefitsspanning three fields. First, in the area of process synchronization it provides the opportunity toeliminate the need for explicit synchronization. Second, in the field of micro-architecture renamingof instruction streams becomes substantially simpler, micro-architectures can become loop-aware,renamed instruction streams can be re-renamed and compiler techniques such as partial redundancyelimination or constant propagation can dynamically be performed by the micro-architecture.Finally, the compilers can focus on what they do best by sharing a common representation with themicro-architecture. As a result, many key optimizations can be efficiently performed. Withinthis paradigm, it becomes possible to develop new optimization algorithms which will rely on themicro-architecture to perform the optimization using analysis performed by the compilers.

今天，几乎所有的处理器都采用功能上相互等同的指令集架构。使用这些传统表示的编译器/微架构合作已经达到了回报递减的地步。因此，本项目研究了单任务程序表示领域，并通过微架构实现对该领域的直接支持，作为一个关键概念，可以打破编译器和架构之间的障碍. 如果成功的话，这种新方法将对未来处理器的设计、编译器内部表示的设计以及编译器的后端设计产生重大影响。它还可以影响在不同粒度下如何利用并行性以及如何执行各种优化。 研究框架可以帮助振兴计算机体系结构和编译器优化的研究，开辟了未知的路径，在高性能系统的研究。 因此，它可以影响到依赖高性能计算的科学和商业的各个领域。围绕单一分配形式的概念进行的固件/硬件集成具有跨越三个领域的诸多优势。首先，在进程同步领域，它提供了消除显式同步需求的机会。第二，在微体系结构领域，指令流的重命名变得非常简单，微体系结构可以感知循环，重命名的指令流可以被重命名，微体系结构可以动态地执行部分冗余消除或常量传播等编译器技术，最后，编译器可以通过与微体系结构共享公共表示来专注于它们最擅长的事情。因此，可以有效地执行许多关键优化。在这种模式下，有可能开发新的优化算法，这些算法将依赖于微体系结构，使用编译器执行的分析来执行优化。