SHF: Small: Single Assignment Architecture / Single Assignment Compiler

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Today, practically all processors employ instruction set architectures which are functionallyequivalent to each other. Compiler/micro-architecture cooperation using these traditionalrepresentations has already reached the point of diminishing returns. This project thereforeinvestigates the domain of single assignment program representations and direct support of thisdomain through micro-architecture implementation as a key concept that can break the barriersbetween the compilers and architectures. If successful, this new approach can have a significantimpact on the design of future processors, design of compiler internal representations as well asthe back-end of the compilers. It can also affect how parallelism is exploited at variousgranularities and how various optimizations are carried out. The investigated framework can helprevitalize computer architecture and compiler optimization research by opening up unexplored pathsfor research in high-performance systems. Consequently, it can affect every field of science andcommerce which rely on high-performance computation. Compiler/hardware integration around the concept of single-assignment form has many benefitsspanning three fields. First, in the area of process synchronization it provides the opportunity toeliminate the need for explicit synchronization. Second, in the field of micro-architecture renamingof instruction streams becomes substantially simpler, micro-architectures can become loop-aware,renamed instruction streams can be re-renamed and compiler techniques such as partial redundancyelimination or constant propagation can dynamically be performed by the micro-architecture.Finally, the compilers can focus on what they do best by sharing a common representation with themicro-architecture. As a result, many key optimizations can be efficiently performed. Withinthis paradigm, it becomes possible to develop new optimization algorithms which will rely on themicro-architecture to perform the optimization using analysis performed by the compilers.