CAREER: Future Values: Reshaping the Future of Instruction Level Parallelism
CAREER: Future Values: Reshaping the Future of Instruction Level Parallelism
批准号:
0347592
负责人:
Soner Onder
金额:
$0.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-02-15 至 2011-01-31
中文摘要
职业生涯:未来价值:重塑指令级并行的未来摘要本研究旨在为指令级并行处理器的取指问题提供有效的解决方案。有了“未来值”的概念,人们可以用一种新的控制流形式来表示传统程序,使得在任何控制流路径上,计算的数据流方面要么是传统的(即,值的定义先于其消费者),要么是相反的(即,值的消费者先于其定义)。因此,即使在数据相关性将禁止在控制流图中这样做时,该表示也允许对指令进行排序。因此,可以无缝地利用控制独立性,使用预测来消除任何分支指令,并设计处理器,从而可以重复使用内部生成的数据流图作为另一个指令源。这种方法有可能显著影响处理器和优化编译器的设计,并对依赖处理器性能的每一个科学和商业领域产生积极影响。该项目还将编制课程材料和软件工具包,并将向公众提供。最后,该项目将对密歇根理工大学最近启动的计算机科学博士项目的发展做出重大贡献。
英文摘要
CAREER: Future Values: Reshaping the Future of Instruction Level ParallelismAbstractThis research aims at providing an effective solution to the fetch problem of instruction level parallel processors. With the concept of "future values", one can represent traditional programs in a new control-flow form such that on any control flow path the data-flow aspect of the computation is either traditional (i.e., definition of a value precedes its consumers), or reversed (i.e., consumers of a value precedes its definition). The representation hence allows ordering of instructions even when the data dependencies would prohibit doing so in a control-flow graph. As a result, it is possible to seamlessly exploit control independence, use predication to eliminate any branch instruction, and design processors, which can reuse the internally generated dataflow graph as another source of instructions. This approach has the potential to significantly impact the design of processors and optimizing compilers, and positively affect every field of science and commerce that relies on processor performance. The project will also result in course materials and software tool sets that will be made publicly available. Finally, the project will contribute greatly to the development of the recently initiated Computer Science Ph.D. program at Michigan Technological University.
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会议论文
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批准号:2211353
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项目类别:Continuing Grant
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资助金额:$60.0万
-
财政年份:2022
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负责人:Soner Onder
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依托单位:
IRES: Track I: Collaborative Research: Supporting FSU and MTU Student Research with NTNU Faculty on Automatic Improvement of Application Performance
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批准号:2103105
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项目类别:Standard Grant
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资助金额:$15.0万
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财政年份:2021
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负责人:Soner Onder
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依托单位:
SHF: Medium: Collaborative Research: Statically Controlled Asynchronous Lane Execution (SCALE)
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批准号:1901005
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项目类别:Continuing Grant
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资助金额:$59.95万
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财政年份:2019
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负责人:Soner Onder
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依托单位:
FoMR: Collaborative Research: Dependent ILP: Dynamic Hoisting and Eager Scheduling of Dependent Instructions
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批准号:1823398
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项目类别:Standard Grant
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资助金额:$21.49万
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财政年份:2018
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负责人:Soner Onder
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依托单位:
XPS: Full: FP: Collaborative Research: Sphinx: Combining Data and Instruction Level Parallelism through Demand Driven Execution of Imperative Programs
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批准号:1533828
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项目类别:Standard Grant
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资助金额:$56.0万
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财政年份:2015
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负责人:Soner Onder
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依托单位:
EAGER: Combining Data and Instruction Level Parallelism through Demand Driven Execution of Imperative Programs
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批准号:1450062
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项目类别:Standard Grant
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资助金额:$9.79万
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财政年份:2014
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负责人:Soner Onder
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依托单位:
SHF: Small: Single Assignment Architecture / Single Assignment Compiler
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批准号:1116551
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项目类别:Standard Grant
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资助金额:$15.3万
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财政年份:2011
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负责人:Soner Onder
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依托单位:
ITR: Exposing the compiler to the hardware: Memory Subsystem Optimizations through Compiler/Micro-architecture Cooperation using Set Membership Information and Color Sets
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批准号:0312892
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项目类别:Standard Grant
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资助金额:$28.0万
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财政年份:2003
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负责人:Soner Onder
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依托单位:
海外基金