GOALI: Materials Integration of III-V Compounds for Electronic Device Applications

这是加州大学洛杉矶分校和诺斯罗普·格鲁曼空间技术公司（NGST，前身为TRW）合作的一个GOALI项目。本项目研究III-V型半导体晶圆键合模板衬底的材料科学问题，该衬底具有较高的体电阻率和适合大晶格参数材料的表面晶格常数，并具有相容的热膨胀系数。研究领域包括：(i)将模板粘合并抛光到GaAs、InP或硅衬底上，（ii）将InP和InAs衬底以及InAlAs分级缓冲层进行离子分裂（氢基），（iii）对复合结构进行应变建模和测量，例如，确定热膨胀差异对结构稳定性的影响，（iv）应变层和晶片键合衬底上器件结构的外延生长，以及(v)电子和结构表征。载流子输运、光致发光、红外和x射线成像，以及透射电子显微镜和原子力显微镜将被实施。应用涉及具有中间介电键合层的结构。目标是开发基于III-V的晶圆键模板，用于使用非兼容层的器件结构的后续外延生长。在退火和外延生长过程中，将研究层脱落、抛光、热错配引起的应变和稳定性问题，以及晶圆键合结构的电子特性。所提出的研究的一个重要组成部分是量化在不同工艺条件下晶圆键合结构中形成的缺陷。将使用的模板层是用氮化硅键合层与GaAs（或InP或硅）衬底键合的InP、InAs和InAlAs层。研究结构性能和电子性能之间关系的测试载体是一个高电子迁移率晶体管（HEMT）结构，该结构使用生长在模板层上的高铟摩尔分数InGaAs通道制造。该项目涉及与高科技相关的电子材料主题领域的基础研究问题。该项目的一个重要特点是高度重视教育，强调研究与教育的结合。该项目的更广泛影响包括工业合作，以及与加州大学洛杉矶分校工程与多样性卓越中心的合作。本科生和高中生将参与该项目。晶圆键合课程将为面向五年级和六年级学生的基层科学计划开发，并通过实践科学演示。研究结果也将在本科和研究生课程中得到强调。工业界的GOALI合作还将拓宽参与该项目的研究生的教育经验，为大学研究人员提供技术先进的加工工具，并通过研讨会和演讲增加技术交流。该项目的多学科和协作性质提供了材料加工，表征和原型设备制造/操作领域的教育和培训

This is a GOALI project with collaboration between UCLA and Northrop Grumman Space Technology (NGST, formerly TRW). The project addresses materials science research issues relevant to III-V semiconductor wafer bonded template substrates having high bulk resistivity and appropriate surface lattice constants for large lattice parameter materials, and with compatible thermal expansion coefficients. Research areas include: (i) bonding and polishing of the templates to a GaAs, InP, or silicon substrate, (ii) ion splitting (hydrogen-based) of InP and InAs substrates and InAlAs graded buffer layers, (iii) strain modeling and measurement of the composite structure to, for example, determine the influence of thermal expansion differences on the stability of the structures, (iv) epitaxial growth of strained layers and of device structures on wafer bonded substrates, and (v) electronic and structural characterization. Carrier transport, photoluminescence, infrared and x-ray imaging will be implemented, as well as transmission electron microscopy, and atomic force microscopy. Applications involve structures with an intermediate dielectric bonding layer. An objective is to develop III-V based wafer bond templates for subsequent epitaxial growth of device structures using non-compliant layers. Issues of layer exfoliation, polishing, thermal-mismatch induced strain, and stability during annealing and epitaxial growth will be studied, as will the electronic properties of wafer-bonded structures. An important component of the proposed research is quantification of defects formed in wafer-bonded structures under different processing conditions. The template layers to be used are InP, InAs, and InAlAs layers wafer-bonded to GaAs (or InP or silicon) substrates with silicon nitride bonding layers. The test vehicle to address the relationship between structural properties and electronic performance is a high electron mobility transistor (HEMT) structure fabricated using high indium mole fraction InGaAs channels grown on the template layers. %%% The project addresses basic research issues in a topical area of electronic materials with high technological relevance. An important feature of the project is the strong emphasis on education, with emphasis on integration of research and education. Broader impacts of the project include industrial collaboration, and collaboration with the UCLA Center for Excellence in Engineering and Diversity. Undergraduate and high school students will be involved in the project. Wafer bonding lessons will be developed for a Grassroots Science Program that targets 5th and 6th grade students with hands-on science demonstrations. Results from the research will also be highlighted in both undergraduate and graduate courses. The industrial GOALI collaborations will also broaden the educational experience of graduate students involved in the project, provide access to technologically advanced processing tools not widely available to university researchers, and increase technological exchanges through seminars and presentations. The multidisciplinary and collaborative nature of the project provides education and training in the areas of materials processing, characterization, and prototype device fabrication/operation.***