Collaborative Research: FuSe: Monolithic 3D Integration (M3D) of 2D Materials-Based CFET Logic Elements towards Advanced Microelectronics

合作研究：FuSe：面向先进微电子学的基于 2D 材料的 CFET 逻辑元件的单片 3D 集成 (M3D)

• 批准号: 2329190
• 负责人: Jeehwan Kim
• 金额: $ 44.63万
• 依托单位: Massachusetts Institute of Technology
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-10-01 至 2026-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2329190&HistoricalAwards=false
• 关键词: Collaborative; Research; FuSe; Monolithic; 3D

Non-Technical:Electronic integration has proven foundational to modern information society. Specifically, the up-scaling in semiconductor industry is one of the most critical steps towards reduced production cost, enhanced performance, and integration density. In this project, a potential transformative technique for developing next-generation semiconductor computing processor is proposed. By prototyping novel integrated electronic devices based on two-dimensional (2D) semiconductors with atomic thickness, ultrathin microelectronic logic element is studied, leading to not only fundamental physics advancements in low-dimensional materials community, but also major advances in semiconductor technologies synergizing vital research areas of materials, electronic devices, and novel circuity architecture. College students will be trained and involved for workforce upgrade and knowledge dissemination. Workshops, symposiums, and tutorials are planned, as well as technical exchange at international conferences to enhance the impact and findings of this project. Collaborations and technical discussions are also planned with semiconductor companies to foster technological translation workforce alignment.Technical:An interdisciplinary study on the three-dimensional (3D) integration of complementary-field effect transistors (C-FET) made by 2D material is proposed for the ultimate solution for the next-generation computing processors. Despite the recent advancement using multi-dimensional gate control technology, the current material and device architectures still encounter fundamental limitation on integration density and multifunctionality. A groundbreaking paradigm leap synergizing the material- and device- and circuit- level has thus attracted enormous interest from both academia and industry. Three significant breakthroughs will be made: (i) Single-crystalline 2D materials have atomic thickness and self-confine nature, it maintains excellent electrical property even under sub-nanometer scale, securing ultimate scalability. (ii) C-FETs are based on the concept of 3D heterogeneous integration of CMOS devices, allowing aggressive cell scaling to realize compact logic circuity. (iii) C-FET based monolithic 3D integration with image sensors will be achieved to explore the possibility of various integration capability based on the C-FET-based circuits. Four objectives will be implemented to promote the suggested breakthroughs: (1) Using the geometrically confined growth method that has recently proven groundbreaking success, high-quality single-crystal 2D materials can be manufactured at large-scale with high yield. (2) Single-crystalline 2D material-based C-FETs will be fabricated with competitive state-of-the-art performance. (3) Enabled with such C-FETs, circuit design of logic cells can be implemented including a full adder and a full substractor. (4) Ultimately, a novel encoder can be realized leveraging this new type of microprocessor, which is a main component of analog-to-digital converters (ADC). Through this, M3D integration with image sensors will be demonstrated to explore integration possibility of the C-FETs circuits. The next-generation computing processor proposed in this project will provide detailed understanding on how to demonstrate high-quality 2D materials, C-FETs, and C-FET based circuits that are key to maximizing their full potential, ultimate scalability and gate-controllability, for semiconductor technologies and industries. The successful achievement of these objectives will pave a new avenue for the next-generation computing processor that can meet the computational demands in the era of data explosion with less power consumption, leading to a considerable surge of interest in the science and application of 2D semiconductors.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

非技术：电子集成已被证明是现代信息社会的基础。具体而言，半导体工业的规模扩大是降低生产成本、提高性能和集成密度的最关键步骤之一。在这个项目中，提出了一种潜在的变革技术，为开发下一代半导体计算处理器。通过原型设计基于具有原子厚度的二维（2D）半导体的新型集成电子器件，研究了微电子逻辑元件，不仅导致低维材料社区的基础物理进步，而且还导致半导体技术的重大进步，从而协同材料、电子器件和新型电路架构的重要研究领域。大学生将接受培训，参与劳动力升级和知识传播。计划举办讲习班、专题讨论会和辅导班，并在国际会议上进行技术交流，以加强该项目的影响和成果。此外，还计划与半导体企业进行合作和技术讨论，以促进技术翻译人才的整合。技术：为下一代计算处理器的最终解决方案，提出了对2D材料制造的互补场效应晶体管（C-FET）进行3D集成的跨学科研究。尽管最近使用多维栅极控制技术的进步，当前的材料和器件架构仍然遇到集成密度和多功能性的基本限制。一个突破性的范式飞跃协同材料和设备和电路水平，因此吸引了学术界和工业界的巨大兴趣。三个重大突破将实现：（i）单晶2D材料具有原子厚度和自限性，即使在亚纳米尺度下也保持优异的电学性能，确保最终的可扩展性。(ii)C-FET基于CMOS器件的3D异构集成概念，允许积极的单元缩放以实现紧凑的逻辑电路。(iii)将实现基于C-FET的单片3D集成图像传感器，以探索基于C-FET的电路的各种集成能力的可能性。将实现四个目标以促进所建议的突破：（1）使用最近被证明取得突破性成功的几何限制生长方法，可以大规模高产量地制造高质量的单晶2D材料。(2)单晶2D材料为基础的C-FET将制造具有竞争力的最先进的性能。(3)利用这种C-FET，可以实现包括全加器和全减法器的逻辑单元的电路设计。(4)最终，一种新型的编码器可以实现利用这种新型的微处理器，这是一个主要组成部分的模数转换器（ADC）。通过这一点，M3 D集成与图像传感器将被证明，探索集成的可能性的C-FET电路。该项目中提出的下一代计算处理器将详细了解如何展示高质量的2D材料，C-FET和基于C-FET的电路，这些电路是最大限度地发挥其全部潜力，最终可扩展性和栅极可控性的关键，用于半导体技术和行业。这些目标的成功实现将为下一代计算处理器铺平一条新的道路，以更低的功耗满足数据爆炸时代的计算需求，该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准。