CSR---AES: Program Phase Detection and Exploitation

对应用程序行为的研究揭示了大型和小型程序阶段的嵌套重复，在内存引用模式、内存和能源使用、I/O活动和微架构资源占用等特征上，各阶段之间存在显著差异。可靠地预测和利用阶段性行为可以允许高级执行系统以更好地匹配程序需求的方式分配资源，或者转换程序，以便它们的需求更好地匹配可用资源。该项目将开发在广泛应用中准确检测和利用阶段性行为所需的技术。具体地说，该项目将结合硬件和运行时监视机制、离线跟踪分析和概要文件驱动的适应。拟议的研究将发展一套更通用的检测机制，比较不同的方法和协调相边界的冲突指示。一旦程序阶段被检测和标记，建议的研究将调查三种主要技术来优化程序性能。数据重组将通过减少延迟和增加有效内存带宽来改善内存层次结构性能。特别是，基于相位的阵列重组和结构拆分将允许应用程序更好地利用缓存并最大限度地减少对内存的直接访问。该系统将包括一个用于程序转换的编译器和一个基于先进硬件支持的运行时监控系统。调度和任务分配将有助于最小化负载不平衡和通信带宽需求。数据并行应用程序中进程之间的相对负载通常在不同阶段之间变化。这些负载的特性将实现静态和动态负载平衡。识别内存引用模式还允许对任务进行位置敏感的分配，从而提高CPU利用率，同时降低带宽需求。I/O预取将利用特定阶段的磁盘数据访问模式，从而提高磁盘利用率并最大限度地减少等待I/O的时间损失。概要驱动算法将建立在pi先前在线内容交付工作的基础上。建议的技术将被合并到流行的运行时系统中。

Studies of application behavior reveal the nested repetition of large and small program phases, with significant variation among phases in such characteristics as memory reference patterns, memory and energy usage, I/O activity, and occupancy of micro-architectural resources. Reliably predicting and exploiting phased behavior can allow an advanced execution system to allocate resources in a way that better matches program needs, or to transform programs so that their needs better match the available resources. This project will develop the technology required to accurately detect and exploit phased behavior in a wide range of applications. Specifically, the project will combine hardware and run-time monitoring mechanisms, off-line trace analysis, and profile driven adaptation. The proposed research will evolve a more general-purpose suite of detection mechanisms, comparing alternative approaches and reconciling conflicting indications of phase boundaries. Once program phases have been detected and marked, the proposed research will investigate three principal techniques to optimize program performance. Data reorganization will improve memory hierarchy performance by reducing latency and increasing effective memory bandwidth. In particular, phase-based array regrouping and structure splitting will allow applications to better utilize the cache and minimize direct access to memory. The system will include a compiler for program transformation and a run-time monitoring system based on advanced hardware support.Scheduling and task assignment will serve to minimize load imbalance and communication bandwidth requirements. Relative loads among processes in data-parallel applications commonly vary from one phase to the next. Characterization of these loads will enable both static and dynamic load balancing. Identification of memory reference patterns will also allow locality-sensitive assignment of tasks, thereby increasing CPU utilization while decreasing bandwidth requirements. I/O prefetching will exploit phase-specific patterns of access to disk data, thereby improving disk utilization and minimizing time lost waiting for I/O. Profile-driven algorithms will build on the PIs' prior work in on-line content delivery. The proposed techniques will be incorporated into popular run-time systems.