Hybrid Wireless Network-on-Chips

智力优势：片上射频（RF）无线通信将被调查，提出一个统一的设计框架，其适用于当代多处理器片上系统（MPSoC）在2D和3D半导体技术。 RF无线通信将与用于2D集成电路（IC）的同一管芯上的多个天线或同一3D IC封装上的多个天线和/或耦合器建立。 为了增强这些片上无线通信信道，将利用无线互连的可重构性的新方法，以及探索所提出的研究的各种无线通信方案的适用性，以利用无线通信中的各种知识来提高MPSoC在计算和功率效率方面的性能。 将在片上网络系统上检查所提出的通信电路和信道质量的性能分析，以观察所提出的新颖性对MPSoC效率的直接影响，突出物理、无线、信道和通信质量以及MPSoC计算效率的权衡。拟议的研究将使下一代低功耗，增加功能的IC，以及为当前和未来（即3D IC，MPSoC）微电子器件提供高性能互连。 无线互连是缓解当代MPSoC中的功率墙和通信挑战的工具，并且通过替换高功耗的基于导线的互连来实现互补金属氧化物半导体技术的进一步扩展。对教育的影响包括：为将无线通信和超大规模集成电路设计课程纳入大学一级而开发的新课程单元、新的研究生课程、学生项目（大学生独立项目和研究经验项目）以及向高中生推广科学、技术、工程和数学学科而产生的影响。 研究人员积极参与外展活动，在VLSI和无线社区创造协同效应，包括最近的一篇关于VLSI社区3000多名收件人的无线互连的时事通讯文章。

Intellectual Merit: On-chip radio-frequency (RF) wireless communication will be investigated to propose a unified design framework for its applicability on contemporary Multi-Processor System-On-Chips (MPSoCs) in 2D and 3D semiconductor technologies. RF wireless communication will be established with multiple antennas on the same die for a 2D integrated circuit (IC), or multiple antennas and/or couplers on the same 3D IC package. In order to enhance these on-chip wireless communication channels, novel approaches in reconfigurability of wireless interconnects will be utilized, as well as exploring the applicability of various wireless communication schemes of the proposed research is in leveraging the diverse knowledge in wireless communications to improve the MPSoC performance in computing and power efficiency. Performance profiling of proposed communication circuits and channel quality will be examined on a network-on-chip system to observe the direct impact of proposed novelties in MPSoC efficiency, highlighting trade-offs in physical, wireless, channel and communication quality and the MPSoC computing efficiency.Broader Impact: Proposed research will enable the next generation of low-power, increased functionality ICs, as well as providing a high performance interconnect for current and future(i.e. 3D IC, MPSoC) microelectronic devices. Wireless interconnects are a vehicle to alleviate the power wall and communication challenge in contemporary MPSoCs and enabling the further scaling of complementary-metal-oxide-semiconductor technology by replacing the power-hungry wire-based interconnects. Impacts on education include those generated by new course modules developed to integrate in undergraduate-level wireless communications and very large scale integration (VLSI) design courses, a new graduate course, student projects (independent and research experience for undergraduates projects) and outreach to high-school students to promote science, technology, engineering and mathematics disciplines. Investigators are proactively participating in outreach activities to create synergy in VLSI and wireless communities, including a recent newsletter article on wireless interconnects to 3000+ recipients in the VLSI community.