CRII: SHF: Design and Analysis of Processing-Near-Memory Enabled GPU Architecture

图形处理单元（gpu）正在成为每个计算系统中不可避免的一部分，因为它们能够实现数量级的速度和节能执行。然而，在性能和能源效率方面，gpu的必要和持续扩展将不是一件容易的事情。先前的研究表明，实现这种扩展的两个最大障碍是有限的内存带宽和内存层次结构中不同级别之间的过多数据移动。为了缓解这两个问题，芯片堆叠技术在高性能节能GPU计算领域获得了发展势头。该技术不仅支持非常高的内存带宽以获得更好的性能，而且还支持处理近内存（PNM），以减少数据移动、访问延迟和能耗。尽管这些技术看起来很有前途，但基于pnm的gpu的架构支持和执行模型及其对整个系统设计的影响在很大程度上尚未得到探索。该项目重新审视了支持PNM的GPU的设计和执行模型，该模型由多个内存堆栈组成，每个内存堆栈包含一个3d堆叠逻辑层，该逻辑层可以由多个PNM GPU内核和其他非核心组件组成。考虑到gpu正在成为从仓库规模的计算机到可穿戴设备的每个计算系统的不可避免的一部分，本研究得出的见解可以对基于gpu的计算产生长期的积极影响。这项研究的结果将纳入现有的和新的本科和研究生课程，这将直接有助于教育和培训学生，包括妇女和来自不同背景和少数群体的学生。首先，将进行详细的设计空间探索，这将涉及研究与PNM核心（例如，寄存器文件，SIMD宽度，管道组件，warp占用），逻辑层的非核心组件（例如，缓存）和堆叠存储器（例如，堆叠存储器的数量）相关的不同设计选择的影响和相互作用。其次，将开发一个计算分布框架（CDF），它将回答：a)什么时候最好将计算映射到PNM核心，b)应该是哪些PNM核心和计算？c)我们如何有效地利用PNM和常规GPU内核？CDF将利用不同的静态和运行时策略来解决许多类似的问题，从而进一步推动能源效率和性能的发展。提出的研究组件将通过广泛的GPGPU应用进行评估。如果成功，这项研究的结果将更好地装备pnm gpu，有效地缓解两大瓶颈：内存带宽和能量。

Graphics Processing Units (GPUs) are becoming an inevitable part of every computing system because of their ability to enable orders of magnitude faster and energy-efficient execution. However, the necessary and continuous scaling of GPUs in terms of performance and energy efficiency will not be an easy task. Prior works have shown that two biggest impediments towards this scaling are the limited memory bandwidth and the excessive data movement across different levels of the memory hierarchy. In order to alleviate these two issues, die-stacking technology is gaining momentum in the realm of high-performance energy-efficient GPU computing. This technology not only enables very high memory bandwidth for better performance but also provides support for processing-near-memory (PNM) to reduce data movement, access latencies, and energy consumption. Although these technologies seem promising, the architectural support and execution models for PNM-based GPUs and their implications on the entire system design have largely been unexplored. This project takes a fresh look at the design and execution model of a PNM-enabled GPU, which consists of multiple memory stacks and each memory stack incorporates a 3D-stacked logic layer that can consist of multiple PNM GPU cores and other uncore components. Considering that GPUs are becoming an inevitable part of every computing system ranging from warehouse-scale computers to wearable devices, the insights resulting from this research can have a long-term positive impact on the GPU-based computing. The findings of this research will be incorporated to existing and new undergraduate and graduate courses, which will directly help in educating and training students, including women and students from diverse backgrounds and minority groups.First, a detailed design space exploration will be performed, which will involve the study of the impact and interactions of different design choices related to PNM cores (e.g., register file, SIMD width, pipeline components, warp occupancy), uncore components at the logic layer (e.g., caches) and stacked memory (e.g., number of stacked memories). Second, a computation distribution framework (CDF) will be developed that will answer: a) when is it preferable to map computations to PNM cores, b) which PNM cores and computations they should be?, and c) how can we effectively take advantage of both PNM and regular GPU cores? The CDF will leverage different static and runtime strategies to address many of such similar questions to push the envelopes of energy efficiency and performance even further. The proposed research components will be evaluated via a wide-range of GPGPU applications.  If successful, the findings of this research would better equip PNM-enabled GPUs to effectively alleviate the two major bottlenecks: memory bandwidth and energy.