CNS Core: Small: Wireless Interconnect Networks on Multi-Die Systems

半导体技术的进步使复杂的计算系统能够集成在小尺寸设备中，这些设备不仅广泛用于计算机，还广泛用于手机等消费电子产品，并实现了一系列应用，如物联网、可穿戴电子产品、便携式医疗设备等。将多个计算和存储单元集成到单个半导体设备中，需要将网络科学（通常是为计算机之间的约束而开发的，例如互联网）扩展到单芯片级别，以便实现片上元件之间的有效通信。这使得在拥有数百个处理元素的单个芯片上进行类似数据中心的操作成为可能，其计算能力相当于计算机网络，但可移植性、成本效益和能源效率大大提高。这些进步对于保持美国在计算、网络和半导体行业的领导地位，以及改善国家人力资源和物理基础设施的连通性至关重要。该项目研究了计算系统、VLSI、天线设计和网络原理，以将一种新型的基于通硅通天线（TVSA）的无线网络系统集成到以异构多芯片集成形式封装的半导体器件中。提出的多模系统无线网络旨在为当前和新兴的工业标准多模处理器创建可扩展、可靠和高效的网络互连。through - silicon - via - antenna通硅天线通硅天线非常适合芯片上的无线通信。本项目侧重于以下任务：(a)包装上TSVA的设计和表征；(b)使用软件定义无线电（SDR）原型测试平台对多模系统进行无线传播建模和信道表征；(c)通过周期精确的系统级模拟，考虑路由、延迟和吞吐量，进行互连网络系统设计。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Advances in semiconductor technology have enabled sophisticated computing systems to be integrated in small form-factor devices that are widely used in not only in computers, but in consumer electronics such as cellphones and have enabled a host of applications, such as the internet-of-things, wearable electronics, portable medical devices, etc. The integration of multiple computing and storage units in a single semiconductor device necessitates the scaling of networking science, typically developed for constraints between computers (such as the internet), down to a single-chip level, in order to enable efficient communication between on-chip elements. This enables data-center-like operation on an individual chip populated with hundreds of processing elements, with computation capabilities that are equivalent to a network of computers, but with much improved portability, cost-effectiveness and energy-efficiency. Such advancements are important to maintain US leadership of the computing, networking and semiconductor industries, as well as improving the connectivity of national human resources and the physical infrastructure.This project investigates computing system, VLSI, antenna design and networking principles for the integration of a novel Through-Silicon-Via-Antenna (TVSA)-based wireless network system into semiconductor devices packaged in the form factor of heterogeneous multi-die integration. The proposed wireless network for multi-die systems aims to create a scalable, reliable, and efficient network interconnect for current and emerging industry-standard multi-die processors. Through-Silicon-Via-Antennas are highly suited for on-chip wireless communication at minuscule footprints. This project focuses on the following tasks: (a) design and characterization of on-package TSVA; (b) wireless propagation modelling and channel characterization for multi-die systems using a Software Defined Radio (SDR) prototyping testbed; and (c) interconnect network system design by considering routing, latency, and throughput via cycle-accurate system-level simulations.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.